From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Vyacheslav Bocharov <adeep@lexina.in>
Date: Thu, 10 Nov 2022 14:52:47 +0300
Subject: arm64: dts: docs: Update mmc meson-gx documentation for new config
 option amlogic,mmc-phase

- amlogic,mmc-phases: 3-element array of clock phases for core, tx, rx
clock with values:
	0: CLK_PHASE_0 - 0 phase
	1: CLK_PHASE_90 - 90 phase
	2: CLK_PHASE_180 - 180 phase
	3: CLK_PHASE_270 - 270 phase
By default driver use <CLK_PHASE_180 CLK_PHASE_0 CLK_PHASE_0> value.

Signed-off-by: Vyacheslav Bocharov <adeep@lexina.in>
- rpardini: in 6.4, Documentation/devicetree/bindings/mmc/amlogic,meson-gx.txt is gone
  and now replaced by Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml
---
 Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml | 11 ++++++++++
 1 file changed, 11 insertions(+)

diff --git a/Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml b/Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml
index bc403ae9e5d9..176c8854f613 100644
--- a/Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml
+++ b/Documentation/devicetree/bindings/mmc/amlogic,meson-gx-mmc.yaml
@@ -51,6 +51,16 @@ properties:
       set when controller's internal DMA engine cannot access the DRAM memory,
       like on the G12A dedicated SDIO controller.
 
+  amlogic,mmc-phases:
+    type: integer
+    description: |
+      3-element array of clock phases for core, tx, rx clock with values:
+      0: CLK_PHASE_0 - 0 phase
+      1: CLK_PHASE_90 - 90 phase
+      2: CLK_PHASE_180 - 180 phase
+      3: CLK_PHASE_270 - 270 phase
+      By default driver use <CLK_PHASE_180 CLK_PHASE_0 CLK_PHASE_0> value.
+
 required:
   - compatible
   - reg
@@ -73,4 +83,5 @@ examples:
         clock-names = "core", "clkin0", "clkin1";
         pinctrl-0 = <&emm_pins>;
         resets = <&reset_mmc>;
+        amlogic,mmc-phases = <CLK_PHASE_180 CLK_PHASE_0 CLK_PHASE_0>;
     };
-- 
Armbian

