From e6a83c8b624052022b8212beabee6e4c40c6d8b2 Mon Sep 17 00:00:00 2001
From: Russell King <rmk+kernel@arm.linux.org.uk>
Date: Tue, 29 Nov 2016 10:13:48 +0000
Subject: implement slot capabilities (SSPL)

---
 drivers/pci/controller/pci-mvebu.c | 20 ++++++++++++++++++++
 1 file changed, 20 insertions(+)

diff --git a/drivers/pci/controller/pci-mvebu.c b/drivers/pci/controller/pci-mvebu.c
index dba5baa2c1ed..c817cc5b2206 100644
--- a/drivers/pci/controller/pci-mvebu.c
+++ b/drivers/pci/controller/pci-mvebu.c
@@ -78,6 +78,7 @@
 #define  PCIE_SSPL_VALUE_MASK		GENMASK(7, 0)
 #define  PCIE_SSPL_SCALE_SHIFT		8
 #define  PCIE_SSPL_SCALE_MASK		GENMASK(9, 8)
+#define  PCIE_SSPL_MSGEN		BIT(14)
 #define  PCIE_SSPL_ENABLE		BIT(16)
 #define PCIE_RC_RTSTA		0x1a14
 #define PCIE_DEBUG_CTRL         0x1a60
@@ -705,6 +706,14 @@ mvebu_pci_bridge_emul_pcie_conf_read(struct pci_bridge_emul *bridge,
 			  (PCI_EXP_LNKSTA_DLLLA << 16) : 0);
 		break;
 
+	case PCI_EXP_SLTCAP:
+	{
+		u32 tmp = mvebu_readl(port, PCIE_SSPL_OFF);
+		*value = FIELD_GET(PCIE_SSPL_SCALE_MASK, tmp) << 15 |
+			 FIELD_GET(PCIE_SSPL_VALUE_MASK, tmp) << 7;
+		break;
+	}
+
 	case PCI_EXP_SLTCTL: {
 		u16 slotctl = le16_to_cpu(bridge->pcie_conf.slotctl);
 		u16 slotsta = le16_to_cpu(bridge->pcie_conf.slotsta);
@@ -882,6 +891,17 @@ mvebu_pci_bridge_emul_pcie_conf_write(struct pci_bridge_emul *bridge,
 		mvebu_writel(port, new, PCIE_CAP_PCIEXP + PCI_EXP_LNKCTL);
 		break;
 
+	case PCI_EXP_SLTCAP:
+	{
+		u32 sspl = FIELD_PREP(PCIE_SSPL_VALUE_MASK,
+				      FIELD_GET(PCI_EXP_SLTCAP_SPLV, new)) |
+			   FIELD_PREP(PCIE_SSPL_SCALE_MASK,
+				      FIELD_GET(PCI_EXP_SLTCAP_SPLS, new)) |
+			   PCIE_SSPL_MSGEN;
+		mvebu_writel(port, sspl, PCIE_SSPL_OFF);
+		break;
+	}
+
 	case PCI_EXP_SLTCTL:
 		/*
 		 * Allow to change PCIE_SSPL_ENABLE bit only when slot power
-- 
cgit 

