From 330824ee7a46474f18d44d247633469e63675afa Mon Sep 17 00:00:00 2001
From: Paolo Sabatino <paolo.sabatino@gmail.com>
Date: Tue, 4 Oct 2022 15:15:19 +0000
Subject: [PATCH] rk322x device tree overlays

---
 arch/arm/boot/dts/overlay/Makefile            |  39 +++++++
 .../boot/dts/overlay/README.rk322x-overlays   |  90 +++++++++++++++
 .../arm/boot/dts/overlay/rk322x-bt-8723cs.dts |  19 ++++
 .../arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts |  68 +++++++++++
 arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts   |  28 +++++
 .../boot/dts/overlay/rk322x-cpu-stability.dts |  52 +++++++++
 arch/arm/boot/dts/overlay/rk322x-ddr3-330.dts |  28 +++++
 arch/arm/boot/dts/overlay/rk322x-ddr3-528.dts |  28 +++++
 arch/arm/boot/dts/overlay/rk322x-ddr3-660.dts |  28 +++++
 arch/arm/boot/dts/overlay/rk322x-ddr3-800.dts |  28 +++++
 .../dts/overlay/rk322x-emmc-ddr-ph180.dts     |  14 +++
 .../boot/dts/overlay/rk322x-emmc-ddr-ph45.dts |  14 +++
 .../boot/dts/overlay/rk322x-emmc-hs200.dts    |  13 +++
 .../arm/boot/dts/overlay/rk322x-emmc-pins.dts |  22 ++++
 arch/arm/boot/dts/overlay/rk322x-emmc.dts     |  20 ++++
 .../arm/boot/dts/overlay/rk322x-fixup.scr-cmd |   4 +
 .../dts/overlay/rk322x-led-conf-default.dts   |  22 ++++
 .../arm/boot/dts/overlay/rk322x-led-conf1.dts |  64 +++++++++++
 .../arm/boot/dts/overlay/rk322x-led-conf2.dts |  64 +++++++++++
 .../arm/boot/dts/overlay/rk322x-led-conf3.dts |  64 +++++++++++
 .../arm/boot/dts/overlay/rk322x-led-conf4.dts |  96 ++++++++++++++++
 .../arm/boot/dts/overlay/rk322x-led-conf5.dts |  97 ++++++++++++++++
 .../arm/boot/dts/overlay/rk322x-led-conf6.dts |  96 ++++++++++++++++
 .../arm/boot/dts/overlay/rk322x-led-conf7.dts | 106 ++++++++++++++++++
 arch/arm/boot/dts/overlay/rk322x-nand.dts     |  22 ++++
 .../dts/overlay/rk322x-usb-otg-peripheral.dts |  11 ++
 .../dts/overlay/rk322x-wlan-alt-wiring.dts    |  67 +++++++++++
 27 files changed, 1204 insertions(+)
 create mode 100755 arch/arm/boot/dts/overlay/Makefile
 create mode 100755 arch/arm/boot/dts/overlay/README.rk322x-overlays
 create mode 100644 arch/arm/boot/dts/overlay/rk322x-bt-8723cs.dts
 create mode 100755 arch/arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts
 create mode 100755 arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
 create mode 100644 arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts
 create mode 100644 arch/arm/boot/dts/overlay/rk322x-ddr3-330.dts
 create mode 100644 arch/arm/boot/dts/overlay/rk322x-ddr3-528.dts
 create mode 100644 arch/arm/boot/dts/overlay/rk322x-ddr3-660.dts
 create mode 100644 arch/arm/boot/dts/overlay/rk322x-ddr3-800.dts
 create mode 100644 arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph180.dts
 create mode 100644 arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph45.dts
 create mode 100644 arch/arm/boot/dts/overlay/rk322x-emmc-hs200.dts
 create mode 100644 arch/arm/boot/dts/overlay/rk322x-emmc-pins.dts
 create mode 100755 arch/arm/boot/dts/overlay/rk322x-emmc.dts
 create mode 100755 arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
 create mode 100644 arch/arm/boot/dts/overlay/rk322x-led-conf-default.dts
 create mode 100755 arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
 create mode 100755 arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
 create mode 100755 arch/arm/boot/dts/overlay/rk322x-led-conf3.dts
 create mode 100644 arch/arm/boot/dts/overlay/rk322x-led-conf4.dts
 create mode 100755 arch/arm/boot/dts/overlay/rk322x-led-conf5.dts
 create mode 100644 arch/arm/boot/dts/overlay/rk322x-led-conf6.dts
 create mode 100644 arch/arm/boot/dts/overlay/rk322x-led-conf7.dts
 create mode 100755 arch/arm/boot/dts/overlay/rk322x-nand.dts
 create mode 100644 arch/arm/boot/dts/overlay/rk322x-usb-otg-peripheral.dts
 create mode 100755 arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts

diff --git a/arch/arm/boot/dts/overlay/Makefile b/arch/arm/boot/dts/overlay/Makefile
new file mode 100755
index 000000000000..36340c3162ce
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/Makefile
@@ -0,0 +1,39 @@
+# SPDX-License-Identifier: GPL-2.0
+dtbo-$(CONFIG_ARCH_ROCKCHIP) += \
+	rk322x-emmc.dtbo	\
+	rk322x-emmc-pins.dtbo	\
+	rk322x-emmc-ddr-ph45.dtbo \
+	rk322x-emmc-ddr-ph180.dtbo \
+	rk322x-emmc-hs200.dtbo	\
+	rk322x-nand.dtbo	\
+	rk322x-led-conf-default.dtbo \
+	rk322x-led-conf1.dtbo	\
+	rk322x-led-conf2.dtbo	\
+	rk322x-led-conf3.dtbo   \
+	rk322x-led-conf4.dtbo   \
+	rk322x-led-conf5.dtbo   \
+	rk322x-led-conf6.dtbo	\
+	rk322x-led-conf7.dtbo	\
+	rk322x-cpu-hs.dtbo	\
+	rk322x-cpu-hs-lv.dtbo	\
+	rk322x-wlan-alt-wiring.dtbo \
+	rk322x-cpu-stability.dtbo \
+	rk322x-ddr3-330.dtbo \
+	rk322x-ddr3-528.dtbo \
+	rk322x-ddr3-660.dtbo \
+	rk322x-ddr3-800.dtbo \
+	rk322x-bt-8723cs.dtbo \
+	rk322x-usb-otg-peripheral.dtbo
+
+
+scr-$(CONFIG_ARCH_ROCKCHIP) += \
+       rk322x-fixup.scr
+
+dtbotxt-$(CONFIG_ARCH_ROCKCHIP) += \
+       README.rk322x-overlays
+
+targets += $(dtbo-y) $(scr-y) $(dtbotxt-y)
+
+always         := $(dtbo-y) $(scr-y) $(dtbotxt-y)
+clean-files    := *.dtbo *.scr
+
diff --git a/arch/arm/boot/dts/overlay/README.rk322x-overlays b/arch/arm/boot/dts/overlay/README.rk322x-overlays
new file mode 100755
index 000000000000..1c366d809212
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/README.rk322x-overlays
@@ -0,0 +1,90 @@
+This document describes overlays provided in the kernel packages
+For generic Armbian overlays documentation please see
+https://docs.armbian.com/User-Guide_Allwinner_overlays/
+
+### Platform:
+
+rk322x (Rockchip)
+
+### Provided overlays:
+
+- rk322x-cpu-hs
+- rk322x-cpu-stability
+- rk322x-emmc*
+- rk322x-nand
+- rk322x-emmc-nand
+- rk322x-led-conf*
+- rk322x-wlan-alt-wiring
+- rk322x-ddr3-*
+- rk322x-bt-*
+- rk322x-usb-otg-peripheral
+
+### Overlay details:
+
+### rk322x-cpu-hs
+
+Activates higher CPU speed (up to 1.4ghz) for rk3228b/rk3229 boxes
+
+### rk322x-cpu-stability
+
+Increases the voltage of the lowest operating point to increase stability
+on some boards which have power regulation issues. Also adds a settling
+time to allow power regulator stabilize voltage.
+
+### emmc*
+
+rk322x-emmc activates onboard emmc device node and deactivates the
+nand controller.
+rk322x-emmc-pins sets the pin controller default pull up/down
+configuration, not all boards are happy with this overlay, so your
+mileage may vary and may want to not use it.
+rk322x-emmc-ddr-ph45/ph180 sets the emmc ddr mode. First overlay
+sets the default phase clock shifting to 45 degrees, the second
+overlay to 180 degrees. They are alternative, choose the one that
+makes your emmc perform better.
+rk322x-emmc-hs200 enables the hs200 mode. It is preferable to
+ddr mode because it is more stable, but old emmc parts don't
+support it.
+
+### nand
+
+Activates onboard nand device node and deactivates the emmc controller.
+Also sets up the pin controller default pull up/down configuration
+
+### rk322x-led-conf*
+
+Each device tree of this kind provides a different known wiring configuration
+(ie: gpio and active low/high) of the onboard leds. Each board manufacturer
+usually choose a different GPIO for the auxiliary led, but the main "working"
+led is always wired to the same gpio (although it may be active high or low)
+led-conf1 is commonly found in boards made by Chiptrip manufacturer
+led-conf2 is found in other boards with R329Q and MXQ_RK3229 marking
+led-conf3 is found in boards with R28-MXQ marking
+led-conf4 is found on boards with T066 marking
+led-conf5 is found on boards with IPB900 marking from AEMS PVT
+led-conf6 is found on boards with MXQ_PRO_V72 and similar markings, possibly
+with eMCP module.
+led-conf7 is found on boards with R29_MXQ marking
+
+### rk322x-alt-wiring
+
+Some boards have different SDIO wiring setup for wifi chips. This overlay
+enables the different pin controller wiring and power enable
+
+### rk322x-ddr3-*
+
+Enable DRAM memory controller and sets the speed to the given speed bin.
+The DRAM memory controller reclocking only works with DDR3/LPDDR3, if
+you enable one of these overlays on boards with DDR2 memory the system
+will not boot anymore
+
+### rk322x-bt-*
+
+Overlays that enable bluetooth devices. Most common bluetooth chips are
+realtek ones.
+rk322x-bt-8723cs: enable this overlay for 8723cs and 8703bs wifi/bluetooth
+
+### rk322x-usb-otg-peripheral
+
+Set the OTG USB port to peripheral mode to be used as USB slave instead
+of USB host
diff --git a/arch/arm/boot/dts/overlay/rk322x-bt-8723cs.dts b/arch/arm/boot/dts/overlay/rk322x-bt-8723cs.dts
new file mode 100644
index 000000000000..48bb04f779fa
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-bt-8723cs.dts
@@ -0,0 +1,19 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+&uart1 {
+    pinctrl-0 = <&uart11_xfer>, <&uart11_rts>, <&uart11_cts>;
+    pinctrl-names = "default";
+    uart-has-rtscts;
+    status = "okay";
+    bluetooth {
+        compatible = "realtek,rtl8723cs-bt";
+        enable-gpios = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
+        device-wake-gpios = <&gpio3 RK_PD3 GPIO_ACTIVE_HIGH>;
+        host-wake-gpios = <&gpio3 RK_PD2 GPIO_ACTIVE_HIGH>;
+    };
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts
new file mode 100755
index 000000000000..5f7d2dcf42d0
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-cpu-hs-lv.dts
@@ -0,0 +1,68 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+	fragment@0 {
+		target = <&cpu0_opp_table>;
+		__overlay__ {
+			opp-600000000 {
+				opp-microvolt = <950000 950000 1275000>;
+			};
+			opp-816000000 {
+				opp-microvolt = <950000 950000 1275000>;
+			};
+			opp-1008000000 {
+				opp-microvolt = <1000000 1000000 1275000>;
+			};
+			opp-1200000000 {
+				opp-microvolt = <1100000 1100000 1275000>;
+			};
+			opp-1296000000 {
+				opp-hz = /bits/ 64 <1296000000>;
+				opp-microvolt = <1150000 1150000 1275000>;
+			};
+			opp-1392000000 {
+				opp-hz = /bits/ 64 <1392000000>;
+				opp-microvolt = <1225000 1225000 1275000>;
+			};
+		};
+	};
+
+	fragment@1 {
+		target = <&gpu_opp_table>;
+		__overlay__ {
+			opp-200000000 {
+				opp-microvolt = <1050000 1050000 1200000>;
+			};
+			opp-300000000 {
+				opp-microvolt = <1050000 1050000 1200000>;
+			};
+			opp-400000000 {
+				opp-microvolt = <1050000 1050000 1200000>;
+			};
+			opp-500000000 {
+				opp-microvolt = <1050000 1050000 1200000>;
+			};
+		};
+	};
+
+	fragment@2 {
+		target = <&dmc_opp_table>;
+		__overlay__ {
+			opp-330000000 {
+				opp-microvolt = <1050000 1050000 1200000>;
+			};
+			opp-534000000 {
+				opp-microvolt = <1050000 1050000 1200000>;
+			};
+			opp-660000000 {
+				opp-microvolt = <1050000 1050000 1200000>;
+			};
+			opp-786000000 {
+				opp-microvolt = <1100000 1050000 1200000>;
+			};
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
new file mode 100755
index 000000000000..1c2fc79e1ccf
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-cpu-hs.dts
@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+	fragment@0 {
+		target = <&cpu0_opp_table>;
+		__overlay__ {
+
+			opp-1296000000 {
+				opp-hz = /bits/ 64 <1296000000>;
+				opp-microvolt = <1325000 1325000 1400000>;
+			};
+			opp-1392000000 {
+				opp-hz = /bits/ 64 <1392000000>;
+				opp-microvolt = <1350000 1350000 1400000>;
+			};
+			/*
+			opp-1464000000 {
+				opp-hz = /bits/ 64 <1464000000>;
+				opp-microvolt = <1400000 1400000 1400000>;
+			};
+			*/
+
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts b/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts
new file mode 100644
index 000000000000..f434af9268fb
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-cpu-stability.dts
@@ -0,0 +1,52 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+	/*
+		Device tree overlay that tries to overcome issues on power regulators (expecially ARM
+		power regulator) increasing lowest voltage and adding settling time to allow voltage
+		stabilization
+	*/
+
+	fragment@0 {
+		target = <&cpu0_opp_table>;
+		__overlay__ {
+
+			/*
+				Increase 600 and 800 Mhz operating points voltage to decrease the range
+				between minimum and maximum voltages
+			*/
+			opp-600000000 {
+				opp-hz = /bits/ 64 <600000000>;
+				opp-microvolt = <1100000>;
+			};
+
+			opp-816000000 {
+				opp-hz = /bits/ 64 <816000000>;
+				opp-microvolt = <1100000>;
+			};
+
+		};
+	};
+
+	fragment@1 {
+		target = <&vdd_arm>;
+		__overlay__ {
+
+			regulator-ramp-delay = <300>; // 30 uV/us, so 0.3v transition settling time is 1ms
+
+		};
+	};
+
+	fragment@2 {
+		target = <&vdd_log>;
+		__overlay__ {
+
+			regulator-ramp-delay = <600>; // 600 uV/us, so 0,3v transition settling time is 0.5ms
+
+		};
+
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-ddr3-330.dts b/arch/arm/boot/dts/overlay/rk322x-ddr3-330.dts
new file mode 100644
index 000000000000..78145548ed7c
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-ddr3-330.dts
@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+	fragment@0 {
+		target = <&dmc>;
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@1 {
+		target = <&dmc_opp_table>;
+		__overlay__ {
+			opp-534000000 {
+				status = "disabled";
+			};
+			opp-660000000 {
+				status = "disabled";
+			};
+			opp-786000000 {
+				status = "disabled";
+			};
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-ddr3-528.dts b/arch/arm/boot/dts/overlay/rk322x-ddr3-528.dts
new file mode 100644
index 000000000000..dbbd222dd8df
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-ddr3-528.dts
@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+	fragment@0 {
+		target = <&dmc>;
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@1 {
+		target = <&dmc_opp_table>;
+		__overlay__ {
+			opp-534000000 {
+				status = "okay";
+			};
+			opp-660000000 {
+				status = "disabled";
+			};
+			opp-786000000 {
+				status = "disabled";
+			};
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-ddr3-660.dts b/arch/arm/boot/dts/overlay/rk322x-ddr3-660.dts
new file mode 100644
index 000000000000..65b707515bfb
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-ddr3-660.dts
@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+	fragment@0 {
+		target = <&dmc>;
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@1 {
+		target = <&dmc_opp_table>;
+		__overlay__ {
+			opp-534000000 {
+				status = "okay";
+			};
+			opp-660000000 {
+				status = "okay";
+			};
+			opp-786000000 {
+				status = "disabled";
+			};
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-ddr3-800.dts b/arch/arm/boot/dts/overlay/rk322x-ddr3-800.dts
new file mode 100644
index 000000000000..7d11453adf9d
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-ddr3-800.dts
@@ -0,0 +1,28 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+	fragment@0 {
+		target = <&dmc>;
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@1 {
+		target = <&dmc_opp_table>;
+		__overlay__ {
+			opp-534000000 {
+				status = "okay";
+			};
+			opp-660000000 {
+				status = "okay";
+			};
+			opp-786000000 {
+				status = "okay";
+			};
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph180.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph180.dts
new file mode 100644
index 000000000000..4ba0afb8a3a4
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph180.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+	fragment@0 {
+		target = <&emmc>;
+		__overlay__ {
+			mmc-ddr-1_8v;
+			rockchip,default-sample-phase = <180>;
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph45.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph45.dts
new file mode 100644
index 000000000000..73104525de57
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc-ddr-ph45.dts
@@ -0,0 +1,14 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+	fragment@0 {
+		target = <&emmc>;
+		__overlay__ {
+			mmc-ddr-1_8v;
+			rockchip,default-sample-phase = <45>;
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-hs200.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-hs200.dts
new file mode 100644
index 000000000000..6ea81f5e74b0
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc-hs200.dts
@@ -0,0 +1,13 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+	fragment@0 {
+		target = <&emmc>;
+		__overlay__ {
+			mmc-hs200-1_8v;
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc-pins.dts b/arch/arm/boot/dts/overlay/rk322x-emmc-pins.dts
new file mode 100644
index 000000000000..0074d029ac84
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc-pins.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+	fragment@0 {
+		target = <&emmc>;
+		__overlay__ {
+			status = "okay";
+			pinctrl-names = "default";
+			pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8 &emmc_pwr &emmc_rst>;
+		};
+	};
+
+	fragment@1 {
+		target = <&nfc>;
+		__overlay__ {
+			status = "disabled";
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-emmc.dts b/arch/arm/boot/dts/overlay/rk322x-emmc.dts
new file mode 100755
index 000000000000..0a59ee30e5ee
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-emmc.dts
@@ -0,0 +1,20 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+	fragment@0 {
+		target = <&emmc>;
+		__overlay__ {
+			status = "okay";
+		};
+	};
+
+	fragment@1 {
+		target = <&nfc>;
+		__overlay__ {
+			status = "disabled";
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd b/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
new file mode 100755
index 000000000000..d4c39e20a3a2
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-fixup.scr-cmd
@@ -0,0 +1,4 @@
+# overlays fixup script
+# implements (or rather substitutes) overlay arguments functionality
+# using u-boot scripting, environment variables and "fdt" command
+
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf-default.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf-default.dts
new file mode 100644
index 000000000000..7e4b35e333e7
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf-default.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+
+	fragment@0 {
+		target-path = "/gpio-leds";
+		__overlay__ {
+
+			working {
+				gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
+				linux,default-trigger = "none";
+			};
+
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
new file mode 100755
index 000000000000..6846109d3008
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf1.dts
@@ -0,0 +1,64 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+
+	fragment@0 {
+		target-path = "/gpio-leds";
+		__overlay__ {
+
+			working {
+				gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
+				linux,default-trigger = "none";
+			};
+
+			auxiliary {
+				gpios = <&gpio0 RK_PA1 GPIO_ACTIVE_HIGH>;
+				label = "auxiliary";
+				linux,default-trigger = "mmc2";
+				default-state = "off";
+				pinctrl-names = "default";
+				pinctrl-0 = <&gpio_led_aux>;
+			};
+
+		};
+	};
+
+	fragment@1 {
+		target-path = "/pinctrl/gpio";
+		__overlay__ {
+
+			gpio_led_aux: gpio-led-aux {
+				rockchip,pins =  <0 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
+			reset_key: reset-key {
+				rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
+			};
+
+		};
+	};
+
+	fragment@2 {
+		target = <&gpio_keys>;
+		__overlay__ {
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&reset_key>;
+
+			reset {
+				gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+				label = "reset";
+				linux,code = <KEY_RESTART>;
+				debounce-interval = <200>;
+				wakeup-source;
+			};
+
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
new file mode 100755
index 000000000000..40bdd5421d68
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf2.dts
@@ -0,0 +1,64 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+
+	fragment@0 {
+		target-path = "/gpio-leds";
+		__overlay__ {
+
+			working {
+				gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
+				linux,default-trigger = "none";
+			};
+
+			auxiliary {
+				gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
+				label = "auxiliary";
+				linux,default-trigger = "mmc2";
+				default-state = "off";
+				pinctrl-names = "default";
+				pinctrl-0 = <&gpio_led_aux>;
+			};
+
+		};
+	};
+
+	fragment@1 {
+		target-path = "/pinctrl/gpio";
+		__overlay__ {
+
+			gpio_led_aux: gpio-led-aux {
+				rockchip,pins =  <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
+			reset_key: reset-key {
+				rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
+			};
+
+		};
+	};
+
+	fragment@2 {
+		target = <&gpio_keys>;
+		__overlay__ {
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&reset_key>;
+
+			reset {
+				gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+				label = "reset";
+				linux,code = <KEY_RESTART>;
+				debounce-interval = <200>;
+				wakeup-source;
+			};
+
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts
new file mode 100755
index 000000000000..03c99ef8b6ad
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf3.dts
@@ -0,0 +1,64 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+
+	fragment@0 {
+		target-path = "/gpio-leds";
+		__overlay__ {
+
+			working {
+				gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
+				linux,default-trigger = "none";
+			};
+
+			auxiliary {
+				gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
+				label = "auxiliary";
+				linux,default-trigger = "mmc2";
+				default-state = "off";
+				pinctrl-names = "default";
+				pinctrl-0 = <&gpio_led_aux>;
+			};
+
+		};
+	};
+
+	fragment@1 {
+		target-path = "/pinctrl/gpio";
+		__overlay__ {
+
+			gpio_led_aux: gpio-led-aux {
+				rockchip,pins =  <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
+			reset_key: reset-key {
+				rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
+			};
+
+		};
+	};
+
+	fragment@2 {
+		target = <&gpio_keys>;
+		__overlay__ {
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&reset_key>;
+
+			reset {
+				gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+				label = "reset";
+				linux,code = <KEY_RESTART>;
+				debounce-interval = <200>;
+				wakeup-source;
+			};
+
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf4.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf4.dts
new file mode 100644
index 000000000000..37dbe3610f28
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf4.dts
@@ -0,0 +1,96 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+
+	fragment@0 {
+		target-path = "/gpio-leds";
+		__overlay__ {
+
+			working {
+				gpios = <&gpio1 RK_PA2 GPIO_ACTIVE_HIGH>;
+				linux,default-trigger = "none";
+			};
+
+			auxiliary {
+				gpios = <&gpio0 RK_PA7 GPIO_ACTIVE_HIGH>;
+				label = "auxiliary";
+				linux,default-trigger = "mmc2";
+				default-state = "off";
+				pinctrl-names = "default";
+				pinctrl-0 = <&gpio_led_aux>;
+			};
+
+		};
+	};
+
+	fragment@1 {
+		target-path = "/pinctrl/gpio";
+		__overlay__ {
+
+			gpio_led_working: gpio-led-working {
+				rockchip,pins = <1 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
+			gpio_led_aux: gpio-led-aux {
+				rockchip,pins =  <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
+		};
+	};
+
+	fragment@2 {
+		target = <&gpio_keys>;
+		__overlay__ {
+
+			reset {
+				gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+				label = "reset";
+				linux,code = <KEY_RESTART>;
+				debounce-interval = <200>;
+				wakeup-source;
+			};
+
+		};
+	};
+
+	fragment@3 {
+		target = <&sdio_pwrseq>;
+		__overlay__ {
+
+			reset-gpios = <&gpio2 RK_PD3 GPIO_ACTIVE_LOW>; /* GPIO2_D3 */
+
+		};
+
+	};
+
+	fragment@4 {
+		target = <&wifi_enable_h>;
+		__overlay__ {
+
+			rockchip,pins = <2 RK_PD3 RK_FUNC_GPIO &pcfg_pull_none>;
+
+		};
+
+	};
+
+	fragment@5 {
+		target = <&sdio>;
+		__overlay__ {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			wifi@1 {
+				compatible = "esp,esp8089";
+				reg = <1>;
+				esp,crystal-26M-en = <0>;
+			};
+
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf5.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf5.dts
new file mode 100755
index 000000000000..f74687eedc9e
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf5.dts
@@ -0,0 +1,97 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/*
+ * gpio configuration for AEMS IPB900 boards
+ *
+ * - enables working and auxiliary leds
+ * - fixes low strength on sdio pins for wifi
+ */
+
+/ {
+
+	fragment@0 {
+		target-path = "/gpio-leds";
+		__overlay__ {
+
+			working {
+				gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>;
+				linux,default-trigger = "none";
+			};
+
+			auxiliary {
+				gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_LOW>;
+				label = "auxiliary";
+				linux,default-trigger = "mmc2";
+				default-state = "off";
+				pinctrl-names = "default";
+				pinctrl-0 = <&gpio_led_aux>;
+			};
+
+		};
+	};
+
+	fragment@1 {
+		target-path = "/pinctrl/gpio";
+		__overlay__ {
+
+			gpio_led_aux: gpio-led-aux {
+				rockchip,pins =  <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
+			reset_key: reset-key {
+				rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
+			};
+
+		};
+	};
+
+	fragment@2 {
+		target = <&gpio_keys>;
+		__overlay__ {
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&reset_key>;
+
+			reset {
+				gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+				label = "reset";
+				linux,code = <KEY_RESTART>;
+				debounce-interval = <200>;
+				wakeup-source;
+			};
+
+		};
+	};
+
+	fragment@3 {
+		target = <&sdio_bus4>;
+		__overlay__ {
+			rockchip,pins = <3 2 1 &pcfg_pull_none_8ma>,
+					<3 3 1 &pcfg_pull_none_8ma>,
+					<3 4 1 &pcfg_pull_none_8ma>,
+					<3 5 1 &pcfg_pull_none_8ma>;
+		};
+
+	};
+
+	fragment@4 {
+		target = <&sdio_clk>;
+		__overlay__ {
+			rockchip,pins = <3 0 1 &pcfg_pull_none_8ma>;
+		};
+	};
+
+	fragment@5 {
+		target = <&sdio_cmd>;
+		__overlay__ {
+			rockchip,pins = <3 1 1 &pcfg_pull_none_8ma>;
+		};
+	};
+
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf6.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf6.dts
new file mode 100644
index 000000000000..0c737f896f4e
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf6.dts
@@ -0,0 +1,96 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/*
+ * gpio configuration for MXQ_PRO eMCP boards
+ *
+ * - fixes low strength on sdio pins for wifi
+ * - correct gpio pins for wifi
+ * - set emmc pins and default phase shift
+ */
+
+/ {
+
+	fragment@0 {
+		target-path = "/pinctrl/gpio";
+		__overlay__ {
+
+			reset_key: reset-key {
+				rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
+			};
+
+		};
+	};
+
+	fragment@1 {
+		target = <&gpio_keys>;
+		__overlay__ {
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&reset_key>;
+
+			reset {
+				gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+				label = "reset";
+				linux,code = <KEY_RESTART>;
+				debounce-interval = <200>;
+				wakeup-source;
+			};
+		
+		};
+	};
+
+	fragment@2 {
+		target = <&sdio_bus4>;
+		__overlay__ {
+			rockchip,pins = <3 2 1 &pcfg_pull_up>,
+					<3 3 1 &pcfg_pull_up>,
+					<3 4 1 &pcfg_pull_up>,
+					<3 5 1 &pcfg_pull_up>;
+		};
+
+	};
+
+	fragment@3 {
+		target = <&sdio_clk>;
+		__overlay__ {
+			rockchip,pins = <3 0 1 &pcfg_pull_none>;
+		};
+	};
+
+	fragment@4 {
+		target = <&sdio_cmd>;
+		__overlay__ {
+			rockchip,pins = <3 1 1 &pcfg_pull_up>;
+		};
+	};
+
+	fragment@5 {
+		target = <&sdio_pwrseq>;
+		__overlay__ {
+			post-power-on-delay-ms = <300>;
+			power-off-delay-us = <200000>;
+			reset-gpios = <&gpio2 RK_PD2 GPIO_ACTIVE_LOW>;
+		};
+	};
+
+	fragment@6 {
+		target = <&sdio>;
+		__overlay__ {
+			#address-cells = <1>;
+			#size-cells = <0>;
+
+			wifi@1 {
+				compatible = "esp,esp8089";
+				reg = <1>;
+				esp,crystal-26M-en = <1>;
+			};
+
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-led-conf7.dts b/arch/arm/boot/dts/overlay/rk322x-led-conf7.dts
new file mode 100644
index 000000000000..dda826d6d6e9
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-led-conf7.dts
@@ -0,0 +1,106 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/input/input.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/*
+ * gpio configuration for R29_MXQ boards
+ *
+ */
+
+/ {
+
+	fragment@0 {
+		target-path = "/gpio-leds";
+		__overlay__ {
+
+			working {
+				gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>;
+				linux,default-trigger = "none";
+			};
+
+			auxiliary {
+				gpios = <&gpio0 RK_PB0 GPIO_ACTIVE_HIGH>;
+				label = "auxiliary";
+				linux,default-trigger = "mmc2";
+				default-state = "off";
+				pinctrl-names = "default";
+				pinctrl-0 = <&gpio_led_aux>;
+			};
+
+			power-status {
+				gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_HIGH>;
+				label = "power-status";
+				linux,default-trigger = "none";
+				default-state = "off";
+				pinctrl-names = "default";
+				pinctrl-0 = <&gpio_led_power_status>;
+			};
+
+			power-suspend {
+				gpios = <&gpio2 RK_PB3 GPIO_ACTIVE_LOW>;
+				label = "power-suspend";
+				linux,default-trigger = "none";
+				default-state = "off";
+				pinctrl-names = "default";
+				pinctrl-0 = <&gpio_led_power_suspend>;
+			};
+
+		};
+	};
+
+	fragment@1 {
+		target-path = "/pinctrl/gpio";
+		__overlay__ {
+
+			gpio_led_aux: gpio-led-aux {
+				rockchip,pins =  <0 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
+			gpio_led_power_status: gpio-led-power-status {
+				rockchip,pins =  <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
+			gpio_led_power_suspend: gpio-led-power-suspend {
+				rockchip,pins =  <2 RK_PB3 RK_FUNC_GPIO &pcfg_pull_none>;
+			};
+
+			reset_key: reset-key {
+				rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_up>;
+			};
+
+		};
+	};
+
+	fragment@2 {
+		target = <&gpio_keys>;
+		__overlay__ {
+
+			pinctrl-names = "default";
+			pinctrl-0 = <&reset_key>;
+
+			reset {
+				gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_LOW>;
+				label = "reset";
+				linux,code = <KEY_RESTART>;
+				debounce-interval = <200>;
+				wakeup-source;
+			};
+
+		};
+	};
+
+	fragment@3 {
+		target = <&emmc>;
+		__overlay__ {
+			rockchip,default-sample-phase = <112>;
+			clock-frequency = <125000000>;
+			max-frequency = <125000000>;
+		};
+
+	};
+
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-nand.dts b/arch/arm/boot/dts/overlay/rk322x-nand.dts
new file mode 100755
index 000000000000..2a939ab492c8
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-nand.dts
@@ -0,0 +1,22 @@
+/dts-v1/;
+/plugin/;
+
+/ {
+
+	fragment@0 {
+		target = <&nfc>;
+		__overlay__ {
+			status = "okay";
+			pinctrl-0 = <&flash_cs0 &flash_cs1 &flash_cs2 &flash_cs3 &flash_rdy &flash_ale &flash_cle &flash_wrn &flash_bus8 &flash_dqs &flash_wp>;
+			pinctrl-names = "default";
+		};
+	};
+
+	fragment@1 {
+		target = <&emmc>;
+		__overlay__ {
+			status = "disabled";
+		};
+	};
+
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-usb-otg-peripheral.dts b/arch/arm/boot/dts/overlay/rk322x-usb-otg-peripheral.dts
new file mode 100644
index 000000000000..01e03d816c1d
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-usb-otg-peripheral.dts
@@ -0,0 +1,11 @@
+/dts-v1/;
+/plugin/;
+
+/*
+ * change OTG USB port mode to "peripheral"
+ *
+ */
+
+&usb_otg {
+	dr_mode = "peripheral";
+};
diff --git a/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts b/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts
new file mode 100755
index 000000000000..f04c9ac166be
--- /dev/null
+++ b/arch/arm/boot/dts/overlay/rk322x-wlan-alt-wiring.dts
@@ -0,0 +1,67 @@
+/dts-v1/;
+/plugin/;
+
+#include <dt-bindings/gpio/gpio.h>
+#include <dt-bindings/pinctrl/rockchip.h>
+
+/ {
+
+	fragment@0 {
+		target = <&pinctrl>;
+		__overlay__ {
+
+			pcfg_pull_none_drv_4ma: pcfg-pull-none-drv-4ma {
+				bias-disable;
+				drive-strength = <0x04>;
+			};
+
+			pcfg_pull_up_drv_4ma: pcfg-pull-up-drv-4ma {
+				bias-pull-up;
+				drive-strength = <0x04>;
+			};
+
+			sdio {
+				sdio_clk: sdio-clk {
+					rockchip,pins = <1 0 1 &pcfg_pull_none_drv_4ma>;
+				};
+
+				sdio_cmd: sdio-cmd {
+					rockchip,pins = <0 3 2 &pcfg_pull_up_drv_4ma>;
+				};
+
+				sdio_bus4: sdio-bus4 {
+					rockchip,pins = <1 1 1 &pcfg_pull_up_drv_4ma>,
+							<1 2 1 &pcfg_pull_up_drv_4ma>,
+							<1 4 1 &pcfg_pull_up_drv_4ma>,
+							<1 5 1 &pcfg_pull_up_drv_4ma>;
+				};
+			};
+
+		};
+
+	};
+
+	fragment@1 {
+		target = <&sdio_pwrseq>;
+		__overlay__ {
+			reset-gpios = <&gpio2 RK_PD5 GPIO_ACTIVE_HIGH>;
+		};
+	};
+
+	fragment@2 {
+		target = <&wifi_enable_h>;
+		__overlay__ {
+			rockchip,pins = <2 RK_PD5 RK_FUNC_GPIO &pcfg_pull_none>;
+		};
+	};
+
+	fragment@3 {
+		target = <&sdio>;
+		__overlay__ {
+			pinctrl-names = "default";
+			pinctrl-0 = <&sdio_clk &sdio_cmd &sdio_bus4>;
+		};
+
+	};
+
+};
-- 
2.34.1

