From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: brentr <brent@mbari.org>
Date: Thu, 13 Oct 2022 18:34:43 +0200
Subject: [ARCHEOLOGY] Rockpis wifi fixes (#4008)

> X-Git-Archeology: > recovered message: > * RockPI-S board has no video I/O
> X-Git-Archeology: > recovered message: > * udev rule to fix MAC address of iface based on UUID
> X-Git-Archeology: > recovered message: > Deals with WiFi chip lacking any EEPROM to store its unique Ethernet MAC address
> X-Git-Archeology: > recovered message: > Generic mechanism -- could be utilized for other boards having similar issues
> X-Git-Archeology: > recovered message: > * Handy Device Tree overlays for the RockPI S
> X-Git-Archeology: > recovered message: > Use armbian-add-overlay to install these
> X-Git-Archeology: > recovered message: > Reduce CPU voltage for the RK3308 B-S
> X-Git-Archeology: > recovered message: > Option to overclock RK3308 B-S to 1.3Ghz
> X-Git-Archeology: > recovered message: > Increase SDIO clock rate from 1Mhz to 10Mhz
> X-Git-Archeology: > recovered message: > This increases WiFi throughput from 300K bytes/s to 2.4M bytes/s
> X-Git-Archeology: > recovered message: > * corrected comment
> X-Git-Archeology: > recovered message: > * No longer repeat standard opp's in this dts
> X-Git-Archeology: > recovered message: > Require that the standard bs dts already be installed
> X-Git-Archeology: > recovered message: > * User README for adding RockPI-S board variant specific dts overlays
> X-Git-Archeology: > recovered message: > * "enabled" --> "okay"
> X-Git-Archeology: > recovered message: > * added mention of sdnand.dts, fixed typo
> X-Git-Archeology: > recovered message: > * added p2p0 to interfaces whose MAC address should be "fixed"
> X-Git-Archeology: > recovered message: > * RK3308 CPU serial number in nvmem replaces UUID for derivation of fixed MAC addr
> X-Git-Archeology: > recovered message: > Restored use of install utility
> X-Git-Archeology: > recovered message: > * Use RK3308 specific CPU serial number
> X-Git-Archeology: > recovered message: > rather than rootfs UUID
> X-Git-Archeology: > recovered message: > * remove generic fixMACaddress
> X-Git-Archeology: > recovered message: > * Install fixMACaddr file-by-file via install utility
> X-Git-Archeology: > recovered message: > * Drive SDIO bus signals faster
> X-Git-Archeology: > recovered message: > setting RK3308_SOC_CON0_VCCIO3 reduces signal rise/fall times to WiFi SDIO chip
> X-Git-Archeology: > recovered message: > from 30ns to 5ns.
> X-Git-Archeology: > recovered message: > This odd fix forward ported from legacy kernel.
> X-Git-Archeology: > recovered message: > Allows Rock Pi-S WiFi to operate at full speed.
> X-Git-Archeology: > recovered message: > * Set RK3308 I/O voltage domains before SDIO initializes
> X-Git-Archeology: > recovered message: > This patch moves responibility form the io-domain to the pinctrl driver because
> X-Git-Archeology: > recovered message: > the io-domain driver is probed after the SDIO devices are discovered.
> X-Git-Archeology: > recovered message: > This was causing multiple SDIO I/O failures during boot.
> X-Git-Archeology: > recovered message: > A new pinctrl property is added:
> X-Git-Archeology: > recovered message: > io-1v8-domains
> X-Git-Archeology: > recovered message: > is a u32 interpreted as a bit mask where each set bit corresponds to
> X-Git-Archeology: > recovered message: > a 1.8V I/O domain (as opposed to the default of 3.3V for I/O)
> X-Git-Archeology: > recovered message: > The mask is writted to the RK3308_SOC_CON0 GRF register
> X-Git-Archeology: > recovered message: > (once) when the pinctrl driver starts
> X-Git-Archeology: > recovered message: > The default mask is 0x10 where only I/O domain 4 runs at 1.8V
> X-Git-Archeology: > recovered message: > This is necessary for the RockPI-S to run the SDIO clock at high (50Mhz) speed
> X-Git-Archeology: > recovered message: > * align whitespace
> X-Git-Archeology: > recovered message: > * factored rk3308bs overlays out up sdio speedup patch
> X-Git-Archeology: > recovered message: > * factored dts for RK3308 iodomains and pinctrl patches out of speedup patch
> X-Git-Archeology: > recovered message: > * remains of sdio speedup patch merely add iodomains support for rk3308
> X-Git-Archeology: > recovered message: > * factored rockpis dts modification out from rk3308 io voltage domains
> X-Git-Archeology: > recovered message: > replaced rk3308 support from iodomains with
> X-Git-Archeology: > recovered message: > new io-voltage-domains property added to pinctrl
> X-Git-Archeology: > recovered message: > io-voltage-domains specific to rk3308 for now, others SOCs may be added later.
> X-Git-Archeology: > recovered message: > * add sequence numbering to names of rk3308 patches
> X-Git-Archeology: > recovered message: > * corrected tab alignment
> X-Git-Archeology: - Revision d3a3afe3850861ceaeb44f3631251c764a28cd43: https://github.com/armbian/build/commit/d3a3afe3850861ceaeb44f3631251c764a28cd43
> X-Git-Archeology:   Date: Thu, 13 Oct 2022 18:34:43 +0200
> X-Git-Archeology:   From: brentr <brent@mbari.org>
> X-Git-Archeology:   Subject: Rockpis wifi fixes (#4008)
> X-Git-Archeology:
> X-Git-Archeology: - Revision 6765f734cc4a22aeaa9f99a3ad28c8c322de26f6: https://github.com/armbian/build/commit/6765f734cc4a22aeaa9f99a3ad28c8c322de26f6
> X-Git-Archeology:   Date: Tue, 25 Oct 2022 11:26:51 +0200
> X-Git-Archeology:   From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
> X-Git-Archeology:   Subject: Bump rockchip64 edge to 6.0.y (#4337)
> X-Git-Archeology:
> X-Git-Archeology: - Revision 92f1a22d76b987afa7ba555d5b509adc51d689e7: https://github.com/armbian/build/commit/92f1a22d76b987afa7ba555d5b509adc51d689e7
> X-Git-Archeology:   Date: Fri, 16 Dec 2022 13:38:13 +0100
> X-Git-Archeology:   From: Igor Pecovnik <igorpecovnik@users.noreply.github.com>
> X-Git-Archeology:   Subject: Re-add rockchip64 6.0 patches (#4575)
> X-Git-Archeology:
> X-Git-Archeology: - Revision 34ae84fac5d0b66a1ab2d1e51534b7beb13ef245: https://github.com/armbian/build/commit/34ae84fac5d0b66a1ab2d1e51534b7beb13ef245
> X-Git-Archeology:   Date: Fri, 05 May 2023 14:22:00 +0200
> X-Git-Archeology:   From: amazingfate <liujianfeng1994@gmail.com>
> X-Git-Archeology:   Subject: bump rockchip64 edge to v6.3
> X-Git-Archeology:
---
 drivers/pinctrl/pinctrl-rockchip.c | 24 +++++
 drivers/soc/rockchip/io-domain.c   | 45 ----------
 2 files changed, 24 insertions(+), 45 deletions(-)

diff --git a/drivers/pinctrl/pinctrl-rockchip.c b/drivers/pinctrl/pinctrl-rockchip.c
index 94af47ad9667..9b9200634bb6 100644
--- a/drivers/pinctrl/pinctrl-rockchip.c
+++ b/drivers/pinctrl/pinctrl-rockchip.c
@@ -40,6 +40,12 @@
 #include "pinconf.h"
 #include "pinctrl-rockchip.h"
 
+#define RK3308_SOC_CON0			0x300
+#define RK3308_SOC_CON0_DOMAINS ((BIT(9)-1)-BIT(7))
+#define RK3308_SOC_CON0_DEFAULT 0x10  //default if no io_1v8_domains specified
+//note that this is supposed to be the reset value, but something early
+//in boot sets SOC_CON0 to zero
+
 /*
  * Generate a bitmask for setting a value (v) with a write mask bit in hiword
  * register 31:16 area.
@@ -3514,6 +3520,24 @@ static int rockchip_pinctrl_probe(struct platform_device *pdev)
 	if (ret)
 		return ret;
 
+	if (ctrl->type == RK3308) {
+	/*
+	 * Update GRF_SOC_CON0 early to reflect board's (fixed) I/O domain voltages
+	 * The io-1v8-domains property may be specified to override default value
+	 */
+		u32 ioVoltSelect = RK3308_SOC_CON0_DEFAULT;
+		device_property_read_u32(dev, "io-1v8-domains", &ioVoltSelect);
+		if (ioVoltSelect & ~RK3308_SOC_CON0_DOMAINS) {
+			dev_warn(dev, "ignored invalid io-1v8-domains\n");
+			ioVoltSelect = RK3308_SOC_CON0_DEFAULT;
+		}
+	  ret = regmap_write(info->regmap_base, RK3308_SOC_CON0,
+		ioVoltSelect | (RK3308_SOC_CON0_DOMAINS << 16));
+		dev_info(dev, "1.8V I/O domains assigned 0x%03x\n", ioVoltSelect);
+		if (ret < 0)
+			dev_warn(dev, "Couldn't update 1.8V I/O domains\n");
+	}
+
 	platform_set_drvdata(pdev, info);
 
 	ret = of_platform_populate(np, NULL, NULL, &pdev->dev);
diff --git a/drivers/soc/rockchip/io-domain.c b/drivers/soc/rockchip/io-domain.c
index 6ffaccd3ed80..6619256c2d11 100644
--- a/drivers/soc/rockchip/io-domain.c
+++ b/drivers/soc/rockchip/io-domain.c
@@ -39,10 +39,6 @@
 #define RK3288_SOC_CON2_FLASH0		BIT(7)
 #define RK3288_SOC_FLASH_SUPPLY_NUM	2
 
-#define RK3308_SOC_CON0			0x300
-#define RK3308_SOC_CON0_VCCIO3		BIT(8)
-#define RK3308_SOC_VCCIO3_SUPPLY_NUM	3
-
 #define RK3328_SOC_CON4			0x410
 #define RK3328_SOC_CON4_VCCIO2		BIT(7)
 #define RK3328_SOC_VCCIO2_SUPPLY_NUM	1
@@ -233,30 +229,6 @@ static void rk3288_iodomain_init(struct rockchip_iodomain *iod)
 		dev_warn(iod->dev, "couldn't update flash0 ctrl\n");
 }
 
-static void rk3308_iodomain_init(struct rockchip_iodomain *iod)
-{
-	int ret;
-	u32 val;
-
-	/* if no vccio3 supply we should leave things alone */
-	if (!iod->supplies[RK3308_SOC_VCCIO3_SUPPLY_NUM].reg)
-		return;
-
-	/*
-	 * vccio3 iodomain voltage should be determined by GPIO4 input state
-	 * RockPI-S uses this to drive the SDIO interface at 50Mhz
-	 * (otherwise SDIO clock will be limited to 10Mhz)
-	 *
-	 * Note that setting vccio4 [rather than vccio3] is observed to reduce
-	 * the rise time of SDIO-clk from 30ns to 5ns.
-	 * The CON0_VCCIO3 control bit appears to influence vccio4.
-	 */
-	val = RK3308_SOC_CON0_VCCIO3 | (RK3308_SOC_CON0_VCCIO3 << 16);
-	ret = regmap_write(iod->grf, RK3308_SOC_CON0, val);
-	if (ret < 0)
-		dev_warn(iod->dev, "couldn't update vccio3 vsel ctrl\n");
-}
-
 static void rk3328_iodomain_init(struct rockchip_iodomain *iod)
 {
 	int ret;
@@ -404,19 +376,6 @@ static const struct rockchip_iodomain_soc_data soc_data_rk3288 = {
 	.init = rk3288_iodomain_init,
 };
 
-static const struct rockchip_iodomain_soc_data soc_data_rk3308 = {
-	.grf_offset = 0x300,
-	.supply_names = {
-		"vccio0",
-		"vccio1",
-		"vccio2",
-		"vccio3",
-		"vccio4",
-		"vccio5",
-	},
-	.init = rk3308_iodomain_init,
-};
-
 static const struct rockchip_iodomain_soc_data soc_data_rk3328 = {
 	.grf_offset = 0x410,
 	.supply_names = {
@@ -569,10 +528,6 @@ static const struct of_device_id rockchip_iodomain_match[] = {
 		.compatible = "rockchip,rk3288-io-voltage-domain",
 		.data = &soc_data_rk3288
 	},
-	{
-		.compatible = "rockchip,rk3308-io-voltage-domain",
-		.data = &soc_data_rk3308
-	},
 	{
 		.compatible = "rockchip,rk3328-io-voltage-domain",
 		.data = &soc_data_rk3328
-- 
Armbian

