From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Samin Guo Date: Wed, 17 Nov 2021 14:50:45 +0800 Subject: dmaengine: dw-axi-dmac: Add StarFive JH7100 support Signed-off-by: Samin Guo Signed-off-by: Emil Renner Berthing --- drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c | 16 ++++++++-- drivers/dma/dw-axi-dmac/dw-axi-dmac.h | 5 +++ 2 files changed, 19 insertions(+), 2 deletions(-) diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c index a7b3ea6644ae..a758ef8a4430 100644 --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac-platform.c @@ -86,7 +86,7 @@ static inline void axi_chan_config_write(struct axi_dma_chan *chan, cfg_lo = (config->dst_multblk_type << CH_CFG_L_DST_MULTBLK_TYPE_POS | config->src_multblk_type << CH_CFG_L_SRC_MULTBLK_TYPE_POS); - if (chan->chip->dw->hdata->reg_map_8_channels) { + if (!IS_ENABLED(CONFIG_SOC_STARFIVE) && chan->chip->dw->hdata->reg_map_8_channels) { cfg_hi = config->tt_fc << CH_CFG_H_TT_FC_POS | config->hs_sel_src << CH_CFG_H_HS_SEL_SRC_POS | config->hs_sel_dst << CH_CFG_H_HS_SEL_DST_POS | @@ -375,11 +375,13 @@ static void axi_chan_block_xfer_start(struct axi_dma_chan *chan, u32 irq_mask; u8 lms = 0; /* Select AXI0 master for LLI fetching */ + chan->is_err = false; if (unlikely(axi_chan_is_hw_enable(chan))) { dev_err(chan2dev(chan), "%s is non-idle!\n", axi_chan_name(chan)); - return; + axi_chan_disable(chan); + chan->is_err = true; } axi_dma_enable(chan->chip); @@ -668,8 +670,13 @@ static int dw_axi_dma_set_hw_desc(struct axi_dma_chan *chan, hw_desc->lli->block_ts_lo = cpu_to_le32(block_ts - 1); +#ifdef CONFIG_SOC_STARFIVE + ctllo |= DWAXIDMAC_BURST_TRANS_LEN_16 << CH_CTL_L_DST_MSIZE_POS | + DWAXIDMAC_BURST_TRANS_LEN_16 << CH_CTL_L_SRC_MSIZE_POS; +#else ctllo |= DWAXIDMAC_BURST_TRANS_LEN_4 << CH_CTL_L_DST_MSIZE_POS | DWAXIDMAC_BURST_TRANS_LEN_4 << CH_CTL_L_SRC_MSIZE_POS; +#endif hw_desc->lli->ctl_lo = cpu_to_le32(ctllo); set_desc_src_master(hw_desc); @@ -1204,6 +1211,7 @@ static int dma_chan_pause(struct dma_chan *dchan) chan->is_paused = true; +out: spin_unlock_irqrestore(&chan->vc.lock, flags); return timeout ? 0 : -EAGAIN; @@ -1485,7 +1493,11 @@ static int dw_probe(struct platform_device *pdev) * Therefore, set constraint to 1024 * 4. */ dw->dma.dev->dma_parms = &dw->dma_parms; +#ifdef CONFIG_SOC_STARFIVE + dma_set_max_seg_size(&pdev->dev, DMAC_MAX_BLK_SIZE); +#else dma_set_max_seg_size(&pdev->dev, MAX_BLOCK_SIZE); +#endif platform_set_drvdata(pdev, chip); pm_runtime_enable(chip->dev); diff --git a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h index e9d5eb0fd594..d6ec88c45f48 100644 --- a/drivers/dma/dw-axi-dmac/dw-axi-dmac.h +++ b/drivers/dma/dw-axi-dmac/dw-axi-dmac.h @@ -49,6 +49,7 @@ struct axi_dma_chan { struct dma_slave_config config; enum dma_transfer_direction direction; bool cyclic; + bool is_err; /* these other elements are all protected by vc.lock */ bool is_paused; }; @@ -281,7 +282,11 @@ enum { #define CH_CTL_L_SRC_MAST BIT(0) /* CH_CFG_H */ +#ifdef CONFIG_SOC_STARFIVE +#define CH_CFG_H_PRIORITY_POS 15 +#else #define CH_CFG_H_PRIORITY_POS 17 +#endif #define CH_CFG_H_DST_PER_POS 12 #define CH_CFG_H_SRC_PER_POS 7 #define CH_CFG_H_HS_SEL_DST_POS 4 -- Armbian