From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: The-going <48602507+The-going@users.noreply.github.com> Date: Wed, 2 Feb 2022 13:02:10 +0300 Subject: arm64:dts:allwinner:overlay: Add Overlays for sunxi64 --- arch/arm64/boot/dts/allwinner/Makefile | 2 + arch/arm64/boot/dts/allwinner/overlay/Makefile | 58 +++ arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays | 196 ++++++++ arch/arm64/boot/dts/allwinner/overlay/README.sun50i-h5-overlays | 250 ++++++++++ arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-fixup.scr-cmd | 95 ++++ arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-i2c0.dtso | 32 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-i2c1.dtso | 22 + arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pps-gpio.dtso | 29 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-add-cs1.dtso | 41 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-jedec-nor.dtso | 34 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-spidev.dtso | 42 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart1.dtso | 22 + arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart2.dtso | 37 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart3.dtso | 32 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart4.dtso | 37 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-w1-gpio.dtso | 29 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-analog-codec.dtso | 17 + arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cir.dtso | 15 + arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-fixup.scr-cmd | 110 ++++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c0.dtso | 20 + arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c1.dtso | 20 + arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c2.dtso | 20 + arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-pps-gpio.dtso | 29 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-pwm.dtso | 39 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spdif-out.dtso | 38 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-add-cs1.dtso | 41 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-jedec-nor.dtso | 42 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-spidev.dtso | 42 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart1.dtso | 22 + arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart2.dtso | 32 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart3.dtso | 32 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost0.dtso | 27 + arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost1.dtso | 27 + arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost2.dtso | 27 + arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost3.dtso | 27 + arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-w1-gpio.dtso | 29 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-fixup.scr-cmd | 110 ++++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-i2c0.dtso | 20 + arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-i2c1.dtso | 20 + arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-i2c2.dtso | 20 + arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-ruart.dtso | 13 + arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-spi-add-cs1.dtso | 41 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-spi-jedec-nor.dtso | 42 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-spi-spidev.dtso | 42 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-spi-spidev1.dtso | 30 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-uart1.dtso | 22 + arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-uart2.dtso | 32 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-uart3.dtso | 32 ++ arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-w1-gpio.dtso | 29 ++ 49 files changed, 2067 insertions(+) diff --git a/arch/arm64/boot/dts/allwinner/Makefile b/arch/arm64/boot/dts/allwinner/Makefile index 9d813575ca26..54424ab784a5 100644 --- a/arch/arm64/boot/dts/allwinner/Makefile +++ b/arch/arm64/boot/dts/allwinner/Makefile @@ -46,3 +46,5 @@ dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h6-tanix-tx6-mini.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-orangepi-zero2.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h616-x96-mate.dtb dtb-$(CONFIG_ARCH_SUNXI) += sun50i-h618-orangepi-zero3.dtb + +subdir-y := $(dts-dirs) overlay diff --git a/arch/arm64/boot/dts/allwinner/overlay/Makefile b/arch/arm64/boot/dts/allwinner/overlay/Makefile new file mode 100644 index 000000000000..ae404a5258a9 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/Makefile @@ -0,0 +1,58 @@ +# SPDX-License-Identifier: GPL-2.0 +dtb-$(CONFIG_ARCH_SUNXI) += \ + sun50i-a64-i2c0.dtbo \ + sun50i-a64-i2c1.dtbo \ + sun50i-a64-pps-gpio.dtbo \ + sun50i-a64-spi-add-cs1.dtbo \ + sun50i-a64-spi-jedec-nor.dtbo \ + sun50i-a64-spi-spidev.dtbo \ + sun50i-a64-uart1.dtbo \ + sun50i-a64-uart2.dtbo \ + sun50i-a64-uart3.dtbo \ + sun50i-a64-uart4.dtbo \ + sun50i-a64-w1-gpio.dtbo \ + sun50i-h5-analog-codec.dtbo \ + sun50i-h5-cir.dtbo \ + sun50i-h5-i2c0.dtbo \ + sun50i-h5-i2c1.dtbo \ + sun50i-h5-i2c2.dtbo \ + sun50i-h5-pps-gpio.dtbo \ + sun50i-h5-pwm.dtbo \ + sun50i-h5-spdif-out.dtbo \ + sun50i-h5-spi-add-cs1.dtbo \ + sun50i-h5-spi-jedec-nor.dtbo \ + sun50i-h5-spi-spidev.dtbo \ + sun50i-h5-uart1.dtbo \ + sun50i-h5-uart2.dtbo \ + sun50i-h5-uart3.dtbo \ + sun50i-h5-usbhost0.dtbo \ + sun50i-h5-usbhost1.dtbo \ + sun50i-h5-usbhost2.dtbo \ + sun50i-h5-usbhost3.dtbo \ + sun50i-h5-w1-gpio.dtbo \ + sun50i-h6-i2c0.dtbo \ + sun50i-h6-i2c1.dtbo \ + sun50i-h6-i2c2.dtbo \ + sun50i-h6-ruart.dtbo \ + sun50i-h6-spi-add-cs1.dtbo \ + sun50i-h6-spi-jedec-nor.dtbo \ + sun50i-h6-spi-spidev.dtbo \ + sun50i-h6-spi-spidev1.dtbo \ + sun50i-h6-uart1.dtbo \ + sun50i-h6-uart2.dtbo \ + sun50i-h6-uart3.dtbo \ + sun50i-h6-w1-gpio.dtbo + +scr-$(CONFIG_ARCH_SUNXI) += \ + sun50i-a64-fixup.scr \ + sun50i-h5-fixup.scr \ + sun50i-h6-fixup.scr + +dtbotxt-$(CONFIG_ARCH_SUNXI) += \ + README.sun50i-a64-overlays \ + README.sun50i-h5-overlays + +targets += $(dtb-y) $(scr-y) $(dtbotxt-y) + +always := $(dtb-y) $(scr-y) $(dtbotxt-y) +clean-files := *.dtbo *.scr diff --git a/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays b/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays new file mode 100644 index 000000000000..cd9dbc686412 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-a64-overlays @@ -0,0 +1,196 @@ +This document describes overlays provided in the kernel packages +For generic Armbian overlays documentation please see +https://docs.armbian.com/Hardware_Allwinner_overlays/ + +### Platform: + +sun50i-a64 (Allwinner A64) + +### Platform details: + +Supported pin banks: PB, PC, PD, PH + +Both SPI controllers have only one hardware CS pin exposed, +adding fixed software (GPIO) chip selects is possible with a separate overlay + +I2C controller 2 (PE14, PE15) pins are used for non-I2C CSI functions or are not available +on supported boards, so this controller is not supported in provided overlays + +### Provided overlays: + +- i2c0 +- i2c1 +- pps-gpio +- spi-add-cs1 +- spi-jedec-nor +- spi-spidev +- uart1 +- uart2 +- uart3 +- uart4 +- w1-gpio + +### Overlay details: + +### i2c0 + +Activates TWI/I2C bus 0 + +I2C0 pins (SCL, SDA): PH0, PH1 + +### i2c1 + +Activates TWI/I2C bus 1 + +I2C1 pins (SCL, SDA): PH2, PH3 + +### pps-gpio + +Activates pulse-per-second GPIO client + +Parameters: + +param_pps_pin (pin) + Pin PPS source is connected to + Optional + Default: PD4 + +param_pps_falling_edge (bool) + Assert by falling edge + Optional + Default: 0 + When set (to 1), assert is indicated by a falling edge + (instead of by a rising edge) + +### spi-add-cs1 + +Adds support for using SPI chip select 1 with GPIO for both SPI controllers +Respective GPIO will be claimed only if controller is enabled by another overlay +This overlay is required for using chip select 1 with other SPI overlays + +SPI 0 pins (CS1): PB6 +SPI 1 pins (CS1): PD6 + +### spi-jedec-nor + +Activates MTD support for JEDEC compatible SPI NOR flash chips on SPI bus +supported by the kernel SPI NOR driver + +SPI 0 pins (MOSI, MISO, SCK, CS): PC0, PC1, PC2, PC3 +SPI 1 pins (MOSI, MISO, SCK, CS): PD2, PD3, PD1, PD0 + +Parameters: + +param_spinor_spi_bus (int) + SPI bus to activate SPI NOR flash support on + Required + Supported values: 0, 1 + +param_spinor_spi_cs (int) + SPI chip select number + Optional + Default: 0 + Supported values: 0, 1 + Using chip select 1 requires using "spi-add-cs1" overlay + +param_spinor_max_freq (int) + Maximum SPI frequency + Optional + Default: 1000000 + Range: 3000 - 100000000 + +### spi-spidev + +Activates SPIdev device node (/dev/spidevX.Y) for userspace SPI access, +where X is the bus number and Y is the CS number + +SPI 0 pins (MOSI, MISO, SCK, CS): PC0, PC1, PC2, PC3 +SPI 1 pins (MOSI, MISO, SCK, CS): PD2, PD3, PD1, PD0 + +Parameters: + +param_spidev_spi_bus (int) + SPI bus to activate SPIdev support on + Required + Supported values: 0, 1 + +param_spidev_spi_cs (int) + SPI chip select number + Optional + Default: 0 + Supported values: 0, 1 + Using chip select 1 requires using "spi-add-cs1" overlay + +param_spidev_max_freq (int) + Maximum SPIdev frequency + Optional + Default: 1000000 + Range: 3000 - 100000000 + +### uart1 + +Activates serial port 1 (/dev/ttyS1) + +UART 1 pins (TX, RX, RTS, CTS): PG6, PG7, PG8, PG9 + +Parameters: + +param_uart1_rtscts (bool) + Enable RTS and CTS pins + Optional + Default: 0 + Set to 1 to enable + +### uart2 + +Activates serial port 2 (/dev/ttyS2) + +UART 2 pins (TX, RX, RTS, CTS): PB0, PB1, PB2, PB3 + +Parameters: + +param_uart2_rtscts (bool) + Enable RTS and CTS pins + Optional + Default: 0 + Set to 1 to enable CTS and RTS pins + +### uart3 + +Activates serial port 3 (/dev/ttyS3) + +UART 3 pins (TX, RX): PD0, PD1 + +### uart4 + +Activates serial port 4 (/dev/ttyS4) + +UART 4 pins (TX, RX, RTS, CTS): PD2, PD3, PD4, PD5 + +Parameters: + +param_uart2_rtscts (bool) + Enable RTS and CTS pins + Optional + Default: 0 + Set to 1 to enable CTS and RTS pins + +### w1-gpio + +Activates 1-Wire GPIO master +Requires external pull-up resistor on data pin + +Parameters: + +param_w1_pin (pin) + Data pin for 1-Wire master + Optional + Default: PD4 + +param_w1_pin_int_pullup (bool) + Enable internal pull-up for the data pin + Optional + Default: 0 + Set to 1 to enable the pull-up + This option should not be used with multiple devices, parasite power setup + or long wires - please use external pull-up resistor instead diff --git a/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-h5-overlays b/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-h5-overlays new file mode 100644 index 000000000000..1ac7fbcf62d1 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/README.sun50i-h5-overlays @@ -0,0 +1,250 @@ +This document describes overlays provided in the kernel packages +For generic Armbian overlays documentation please see +https://docs.armbian.com/User-Guide_Allwinner_overlays/ + +### Platform: + +sun50i-h5 (Allwinner H5) + +### Platform details: + +Supported pin banks: PA, PC, PD, PG + +Both SPI controllers have only one hardware CS pin exposed, +adding fixed software (GPIO) chip selects is possible with a separate overlay + +### Provided overlays: + +- analog-codec +- cir +- i2c0 +- i2c1 +- i2c2 +- pps-gpio +- pwm +- spdif-out +- spi-add-cs1 +- spi-jedec-nor +- spi-spidev +- uart1 +- uart2 +- uart3 +- usbhost0 +- usbhost1 +- usbhost2 +- usbhost3 +- w1-gpio + +### Overlay details: + +### analog-codec + +Activates SoC analog codec driver that provides Line Out and Mic In +functionality + +### cir + +Activates CIR (Infrared remote) receiver + +CIR pin: PL11 + +### i2c0 + +Activates TWI/I2C bus 0 + +I2C0 pins (SCL, SDA): PA11, PA12 + +### i2c1 + +Activates TWI/I2C bus 1 + +I2C1 pins (SCL, SDA): PA18, PA19 + +### i2c2 + +Activates TWI/I2C bus 2 + +I2C2 pins (SCL, SDA): PE12, PE13 + +On most board this bus is wired to Camera (CSI) socket + +### pps-gpio + +Activates pulse-per-second GPIO client + +Parameters: + +param_pps_pin (pin) + Pin PPS source is connected to + Optional + Default: PD14 + +param_pps_falling_edge (bool) + Assert by falling edge + Optional + Default: 0 + When set (to 1), assert is indicated by a falling edge + (instead of by a rising edge) + +### pwm + +Activates hardware PWM controller + +PWM pin: PA5 + +Pin PA5 is used as UART0 RX by default, so if this overlay is activated, +UART0 and kernel console on ttyS0 will be disabled + +### spdif-out + +Activates SPDIF/Toslink audio output + +SPDIF pin: PA17 + +### spi-add-cs1 + +Adds support for using SPI chip select 1 with GPIO for both SPI controllers +Respective GPIO will be claimed only if controller is enabled by another +overlay +This overlay is required for using chip select 1 with other SPI overlays +Due to the u-boot limitations CS1 pin can't be customized by a parameter, but +it can be changed by using an edited copy of this overlay +A total of 4 chip selects can be used with custom overlays (1 HW + 3 GPIO) + +SPI 0 pins (CS1): PA21 +SPI 1 pins (CS1): PA10 + +### spi-jedec-nor + +Activates MTD support for JEDEC compatible SPI NOR flash chips on SPI bus +supported by the kernel SPI NOR driver + +SPI 0 pins (MOSI, MISO, SCK, CS): PC0, PC1, PC2, PC3 +SPI 1 pins (MOSI, MISO, SCK, CS): PA15, PA16, PA14, PA13 + +Parameters: + +param_spinor_spi_bus (int) + SPI bus to activate SPI NOR flash support on + Required + Supported values: 0, 1 + +param_spinor_spi_cs (int) + SPI chip select number + Optional + Default: 0 + Supported values: 0, 1 + Using chip select 1 requires using "spi-add-cs1" overlay + +param_spinor_max_freq (int) + Maximum SPI frequency + Optional + Default: 1000000 + Range: 3000 - 100000000 + +### spi-spidev + +Activates SPIdev device node (/dev/spidevX.Y) for userspace SPI access, +where X is the bus number and Y is the CS number + +SPI 0 pins (MOSI, MISO, SCK, CS): PC0, PC1, PC2, PC3 +SPI 1 pins (MOSI, MISO, SCK, CS): PA15, PA16, PA14, PA13 + +Parameters: + +param_spidev_spi_bus (int) + SPI bus to activate SPIdev support on + Required + Supported values: 0, 1 + +param_spidev_spi_cs (int) + SPI chip select number + Optional + Default: 0 + Supported values: 0, 1 + Using chip select 1 requires using "spi-add-cs1" overlay + +param_spidev_max_freq (int) + Maximum SPIdev frequency + Optional + Default: 1000000 + Range: 3000 - 100000000 + +### uart1 + +Activates serial port 1 (/dev/ttyS1) + +UART 1 pins (TX, RX, RTS, CTS): PG6, PG7, PG8, PG9 + +Parameters: + +param_uart1_rtscts (bool) + Enable RTS and CTS pins + Optional + Default: 0 + Set to 1 to enable + +### uart2 + +Activates serial port 2 (/dev/ttyS2) + +UART 2 pins (TX, RX, RTS, CTS): PA0, PA1, PA2, PA3 + +Parameters: + +param_uart2_rtscts (bool) + Enable RTS and CTS pins + Optional + Default: 0 + Set to 1 to enable CTS and RTS pins + +### uart3 + +Activates serial port 3 (/dev/ttyS3) + +UART 3 pins (TX, RX, RTS, CTS): PA13, PA14, PA15, PA16 + +Parameters: + +param_uart3_rtscts (bool) + Enable RTS and CTS pins + Optional + Default: 0 + Set to 1 to enable CTS and RTS pins + +### usbhost0 + +Activates USB host controller 0 + +### usbhost1 + +Activates USB host controller 1 + +### usbhost2 + +Activates USB host controller 2 + +### usbhost3 + +Activates USB host controller 3 + +### w1-gpio + +Activates 1-Wire GPIO master +Requires an external pull-up resistor on the data pin +or enabling the internal pull-up + +Parameters: + +param_w1_pin (pin) + Data pin for 1-Wire master + Optional + Default: PD14 + +param_w1_pin_int_pullup (bool) + Enable internal pull-up for the data pin + Optional + Default: 0 + Set to 1 to enable the pull-up + This option should not be used with multiple devices, parasite power setup + or long wires - please use external pull-up resistor instead diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-fixup.scr-cmd b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-fixup.scr-cmd new file mode 100644 index 000000000000..9b34c05ecf18 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-fixup.scr-cmd @@ -0,0 +1,95 @@ +# overlays fixup script +# implements (or rather substitutes) overlay arguments functionality +# using u-boot scripting, environment variables and "fdt" command + +# setexpr test_var ${tmp_bank} - A +# works only for hex numbers (A-F) + +setenv decompose_pin 'setexpr tmp_bank sub "P(B|C|D|H)\\d+" "\\1"; +setexpr tmp_pin sub "P\\S(\\d+)" "\\1"; +test "${tmp_bank}" = "B" && setenv tmp_bank 1; +test "${tmp_bank}" = "C" && setenv tmp_bank 2; +test "${tmp_bank}" = "D" && setenv tmp_bank 3; +test "${tmp_bank}" = "H" && setenv tmp_bank 7' + +if test -n "${param_spinor_spi_bus}"; then + test "${param_spinor_spi_bus}" = "0" && setenv tmp_spi_path "spi@1c68000" + test "${param_spinor_spi_bus}" = "1" && setenv tmp_spi_path "spi@1c69000" + fdt set /soc/${tmp_spi_path} status "okay" + fdt set /soc/${tmp_spi_path}/spiflash@0 status "okay" + if test -n "${param_spinor_max_freq}"; then + fdt set /soc/${tmp_spi_path}/spiflash@0 spi-max-frequency "<${param_spinor_max_freq}>" + fi + if test "${param_spinor_spi_cs}" = "1"; then + fdt set /soc/${tmp_spi_path}/spiflash@0 reg "<1>"; + fi + env delete tmp_spi_path +fi + +if test -n "${param_spidev_spi_bus}"; then + test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@1c68000" + test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@1c69000" + fdt set /soc/${tmp_spi_path} status "okay" + fdt set /soc/${tmp_spi_path}/spidev status "okay" + if test -n "${param_spidev_max_freq}"; then + fdt set /soc/${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>" + fi + if test "${param_spidev_spi_cs}" = "1"; then + fdt set /soc/${tmp_spi_path}/spidev reg "<1>"; + fi +fi + +if test -n "${param_pps_pin}"; then + setenv tmp_bank "${param_pps_pin}" + setenv tmp_pin "${param_pps_pin}" + run decompose_pin + fdt set /soc/pinctrl@1c20800/pps_pins pins "${param_pps_pin}" + fdt get value tmp_phandle /soc/pinctrl@1c20800 phandle + fdt set /pps@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>" + env delete tmp_pin tmp_bank tmp_phandle +fi + +if test "${param_pps_falling_edge}" = "1"; then + fdt set /pps@0 assert-falling-edge +fi + +if test -n "${param_w1_pin}"; then + setenv tmp_bank "${param_w1_pin}" + setenv tmp_pin "${param_w1_pin}" + run decompose_pin + fdt set /soc/pinctrl@1c20800/w1_pins pins "${param_w1_pin}" + fdt get value tmp_phandle /soc/pinctrl@1c20800 phandle + fdt set /onewire@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>" + env delete tmp_pin tmp_bank tmp_phandle +fi + +if test "${param_w1_pin_int_pullup}" = "1"; then + fdt set /soc/pinctrl@1c20800/w1_pins bias-pull-up +fi + +if test "${param_uart1_rtscts}" = "1"; then + fdt get value tmp_phandle1 /soc/pinctrl@1c20800/uart1-pins phandle + fdt get value tmp_phandle2 /soc/pinctrl@1c20800/uart1-rts-cts-pins phandle + fdt set /soc/serial@1c28400 pinctrl-names "default" "default" + fdt set /soc/serial@1c28400 pinctrl-0 "<${tmp_phandle1}>" + fdt set /soc/serial@1c28400 pinctrl-1 "<${tmp_phandle2}>" + env delete tmp_phandle1 tmp_phandle2 +fi + +if test "${param_uart2_rtscts}" = "1"; then + fdt get value tmp_phandle1 /soc/pinctrl@1c20800/uart2-pins phandle + fdt get value tmp_phandle2 /soc/pinctrl@1c20800/uart2-rts-cts-pins phandle + fdt set /soc/serial@1c28800 pinctrl-names "default" "default" + fdt set /soc/serial@1c28800 pinctrl-0 "<${tmp_phandle1}>" + fdt set /soc/serial@1c28800 pinctrl-1 "<${tmp_phandle2}>" + env delete tmp_phandle1 tmp_phandle2 +fi + +if test "${param_uart4_rtscts}" = "1"; then + fdt get value tmp_phandle1 /soc/pinctrl@1c20800/uart4-pins phandle + fdt get value tmp_phandle2 /soc/pinctrl@1c20800/uart4-rts-cts-pins phandle + fdt set /soc/serial@1c29000 pinctrl-names "default" "default" + fdt set /soc/serial@1c29000 pinctrl-0 "<${tmp_phandle1}>" + fdt set /soc/serial@1c29000 pinctrl-1 "<${tmp_phandle2}>" + env delete tmp_phandle1 tmp_phandle2 +fi diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-i2c0.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-i2c0.dtso new file mode 100644 index 000000000000..37bdb2c2fae3 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-i2c0.dtso @@ -0,0 +1,32 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-a64"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c0 = "/soc/i2c@1c2ac00"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + i2c0_pins: i2c0_pins { + pins = "PH0", "PH1"; + function = "i2c0"; + }; + }; + }; + + fragment@2 { + target = <&i2c0>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0_pins>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-i2c1.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-i2c1.dtso new file mode 100644 index 000000000000..b2483c9cd7b2 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-i2c1.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-a64"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c1 = "/soc/i2c@1c2b000"; + }; + }; + + fragment@1 { + target = <&i2c1>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&i2c1_pins>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pps-gpio.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pps-gpio.dtso new file mode 100644 index 000000000000..5fa161c4718e --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-pps-gpio.dtso @@ -0,0 +1,29 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-a64"; + + fragment@0 { + target = <&pio>; + __overlay__ { + pps_pins: pps_pins { + pins = "PD4"; + function = "gpio_in"; + }; + }; + }; + + fragment@1 { + target-path = "/"; + __overlay__ { + pps@0 { + compatible = "pps-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pps_pins>; + gpios = <&pio 3 4 0>; /* PD4 */ + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-add-cs1.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-add-cs1.dtso new file mode 100644 index 000000000000..4432aac51f2e --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-add-cs1.dtso @@ -0,0 +1,41 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-a64"; + + fragment@0 { + target = <&pio>; + __overlay__ { + spi0_cs1: spi0_cs1 { + pins = "PB6"; + function = "gpio_out"; + output-high; + }; + + spi1_cs1: spi1_cs1 { + pins = "PD6"; + function = "gpio_out"; + output-high; + }; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + pinctrl-names = "default", "default"; + pinctrl-1 = <&spi0_cs1>; + cs-gpios = <0>, <&pio 1 6 0>; /* PB6 */ + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + pinctrl-names = "default", "default"; + pinctrl-1 = <&spi1_cs1>; + cs-gpios = <0>, <&pio 3 6 0>; /* PD6 */ + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-jedec-nor.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-jedec-nor.dtso new file mode 100644 index 000000000000..31d73e572281 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-jedec-nor.dtso @@ -0,0 +1,34 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-a64"; + + fragment@0 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <1000000>; + status = "disabled"; + }; + }; + }; + + fragment@1 { + target = <&spi1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <1000000>; + status = "disabled"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-spidev.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-spidev.dtso new file mode 100644 index 000000000000..84a435b79bee --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-spi-spidev.dtso @@ -0,0 +1,42 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-a64"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc/spi@1c68000"; + spi1 = "/soc/spi@1c69000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart1.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart1.dtso new file mode 100644 index 000000000000..4d8dac1a59cb --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart1.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-a64"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial1 = "/soc/serial@1c28800"; + }; + }; + + fragment@1 { + target = <&uart1>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart2.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart2.dtso new file mode 100644 index 000000000000..7286d7360df1 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart2.dtso @@ -0,0 +1,37 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-a64"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial2 = "/soc/serial@1c28800"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + uart2_pins: uart2-pins { + pins = "PB0", "PB1"; + function = "uart2"; + }; + + uart2_rts_cts_pins: uart2-rts-cts-pins { + pins = "PB2", "PB3"; + function = "uart2"; + }; + }; + }; + + fragment@2 { + target = <&uart2>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart3.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart3.dtso new file mode 100644 index 000000000000..c5729b9d2568 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart3.dtso @@ -0,0 +1,32 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-a64"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial3 = "/soc/serial@1c28c00"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + uart3_pins: uart3-pins { + pins = "PD0", "PD1"; + function = "uart3"; + }; + }; + }; + + fragment@2 { + target = <&uart3>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart4.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart4.dtso new file mode 100644 index 000000000000..21c9b738aa93 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-uart4.dtso @@ -0,0 +1,37 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-a64"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial4 = "/soc/serial@1c29000"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + uart4_pins: uart4-pins { + pins = "PD2", "PD3"; + function = "uart4"; + }; + + uart4_rts_cts_pins: uart4-rts-cts-pins { + pins = "PD4", "PD5"; + function = "uart4"; + }; + }; + }; + + fragment@2 { + target = <&uart4>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart4_pins>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-w1-gpio.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-w1-gpio.dtso new file mode 100644 index 000000000000..d230469135de --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-a64-w1-gpio.dtso @@ -0,0 +1,29 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-a64"; + + fragment@0 { + target = <&pio>; + __overlay__ { + w1_pins: w1_pins { + pins = "PD4"; + function = "gpio_in"; + }; + }; + }; + + fragment@1 { + target-path = "/"; + __overlay__ { + onewire@0 { + compatible = "w1-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&w1_pins>; + gpios = <&pio 3 4 0>; /* PD4 */ + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-analog-codec.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-analog-codec.dtso new file mode 100644 index 000000000000..aaa66d5e7ca1 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-analog-codec.dtso @@ -0,0 +1,17 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target = <&codec>; + __overlay__ { + allwinner,audio-routing = + "Line Out", "LINEOUT", + "MIC1", "Mic", + "Mic", "MBIAS"; + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cir.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cir.dtso new file mode 100644 index 000000000000..90c264a0ab78 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-cir.dtso @@ -0,0 +1,15 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target = <&ir>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&r_ir_rx_pin>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-fixup.scr-cmd b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-fixup.scr-cmd new file mode 100644 index 000000000000..7abb64d84a8a --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-fixup.scr-cmd @@ -0,0 +1,110 @@ +# overlays fixup script +# implements (or rather substitutes) overlay arguments functionality +# using u-boot scripting, environment variables and "fdt" command + +# setexpr test_var ${tmp_bank} - A +# works only for hex numbers (A-F) + +setenv decompose_pin 'setexpr tmp_bank sub "P(A|C|D|G)\\d+" "\\1"; +setexpr tmp_pin sub "P\\S(\\d+)" "\\1"; +test "${tmp_bank}" = "A" && setenv tmp_bank 0; +test "${tmp_bank}" = "C" && setenv tmp_bank 2; +test "${tmp_bank}" = "D" && setenv tmp_bank 3; +test "${tmp_bank}" = "G" && setenv tmp_bank 6' + +if test -n "${param_spinor_spi_bus}"; then + test "${param_spinor_spi_bus}" = "0" && setenv tmp_spi_path "spi@1c68000" + test "${param_spinor_spi_bus}" = "1" && setenv tmp_spi_path "spi@1c69000" + fdt set /soc/${tmp_spi_path} status "okay" + fdt set /soc/${tmp_spi_path}/spiflash@0 status "okay" + if test -n "${param_spinor_max_freq}"; then + fdt set /soc/${tmp_spi_path}/spiflash@0 spi-max-frequency "<${param_spinor_max_freq}>" + fi + if test "${param_spinor_spi_cs}" = "1"; then + fdt set /soc/${tmp_spi_path}/spiflash@0 reg "<1>" + fi + env delete tmp_spi_path +fi + +if test -n "${param_spidev_spi_bus}"; then + test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@1c68000" + test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@1c69000" + fdt set /soc/${tmp_spi_path} status "okay" + fdt set /soc/${tmp_spi_path}/spidev status "okay" + if test -n "${param_spidev_max_freq}"; then + fdt set /soc/${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>" + fi + if test "${param_spidev_spi_cs}" = "1"; then + fdt set /soc/${tmp_spi_path}/spidev reg "<1>" + fi + env delete tmp_spi_path +fi + +if test -n "${param_pps_pin}"; then + setenv tmp_bank "${param_pps_pin}" + setenv tmp_pin "${param_pps_pin}" + run decompose_pin + fdt set /soc/pinctrl@1c20800/pps_pins pins "${param_pps_pin}" + fdt get value tmp_phandle /soc/pinctrl@1c20800 phandle + fdt set /pps@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>" + env delete tmp_pin tmp_bank tmp_phandle +fi + +if test "${param_pps_falling_edge}" = "1"; then + fdt set /pps@0 assert-falling-edge +fi + +for f in ${overlays}; do + if test "${f}" = "pwm"; then + setenv bootargs_new "" + for arg in ${bootargs}; do + if test "${arg}" = "console=ttyS0,115200"; then + echo "Warning: Disabling ttyS0 console due to enabled PWM overlay" + else + setenv bootargs_new "${bootargs_new} ${arg}" + fi + done + setenv bootargs "${bootargs_new}" + fi +done + +if test -n "${param_w1_pin}"; then + setenv tmp_bank "${param_w1_pin}" + setenv tmp_pin "${param_w1_pin}" + run decompose_pin + fdt set /soc/pinctrl@1c20800/w1_pins pins "${param_w1_pin}" + fdt get value tmp_phandle /soc/pinctrl@1c20800 phandle + fdt set /onewire@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>" + env delete tmp_pin tmp_bank tmp_phandle +fi + +if test "${param_w1_pin_int_pullup}" = "1"; then + fdt set /soc/pinctrl@1c20800/w1_pins bias-pull-up +fi + +if test "${param_uart1_rtscts}" = "1"; then + fdt get value tmp_phandle1 /soc/pinctrl@1c20800/uart1-pins phandle + fdt get value tmp_phandle2 /soc/pinctrl@1c20800/uart1-rts-cts-pins phandle + fdt set /soc/serial@1c28400 pinctrl-names "default" "default" + fdt set /soc/serial@1c28400 pinctrl-0 "<${tmp_phandle1}>" + fdt set /soc/serial@1c28400 pinctrl-1 "<${tmp_phandle2}>" + env delete tmp_phandle1 tmp_phandle2 +fi + +if test "${param_uart2_rtscts}" = "1"; then + fdt get value tmp_phandle1 /soc/pinctrl@1c20800/uart2-pins phandle + fdt get value tmp_phandle2 /soc/pinctrl@1c20800/uart2-rts-cts-pins phandle + fdt set /soc/serial@1c28800 pinctrl-names "default" "default" + fdt set /soc/serial@1c28800 pinctrl-0 "<${tmp_phandle1}>" + fdt set /soc/serial@1c28800 pinctrl-1 "<${tmp_phandle2}>" + env delete tmp_phandle1 tmp_phandle2 +fi + +if test "${param_uart3_rtscts}" = "1"; then + fdt get value tmp_phandle1 /soc/pinctrl@1c20800/uart3-pins phandle + fdt get value tmp_phandle2 /soc/pinctrl@1c20800/uart3-rts-cts-pins phandle + fdt set /soc/serial@1c28c00 pinctrl-names "default" "default" + fdt set /soc/serial@1c28c00 pinctrl-0 "<${tmp_phandle1}>" + fdt set /soc/serial@1c28c00 pinctrl-1 "<${tmp_phandle2}>" + env delete tmp_phandle1 tmp_phandle2 +fi diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c0.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c0.dtso new file mode 100644 index 000000000000..87fbd7e51a11 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c0.dtso @@ -0,0 +1,20 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c0 = "/soc/i2c@1c2ac00"; + }; + }; + + fragment@1 { + target = <&i2c0>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c1.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c1.dtso new file mode 100644 index 000000000000..6008b9a0853e --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c1.dtso @@ -0,0 +1,20 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c1 = "/soc/i2c@1c2b000"; + }; + }; + + fragment@1 { + target = <&i2c1>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c2.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c2.dtso new file mode 100644 index 000000000000..2980dbf34300 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-i2c2.dtso @@ -0,0 +1,20 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c2 = "/soc/i2c@1c2b400"; + }; + }; + + fragment@1 { + target = <&i2c2>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-pps-gpio.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-pps-gpio.dtso new file mode 100644 index 000000000000..46e067562e3d --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-pps-gpio.dtso @@ -0,0 +1,29 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target = <&pio>; + __overlay__ { + pps_pins: pps_pins { + pins = "PD14"; + function = "gpio_in"; + }; + }; + }; + + fragment@1 { + target-path = "/"; + __overlay__ { + pps@0 { + compatible = "pps-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&pps_pins>; + gpios = <&pio 3 14 0>; /* PD14 */ + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-pwm.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-pwm.dtso new file mode 100644 index 000000000000..6d12e8420de9 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-pwm.dtso @@ -0,0 +1,39 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target-path = "/chosen"; + __overlay__ { + /delete-property/ stdout-path; + }; + }; + + fragment@1 { + target = <&uart0>; + __overlay__ { + status = "disabled"; + }; + }; + + fragment@2 { + target = <&pio>; + __overlay__ { + pwm0_pin: pwm0 { + pins = "PA5"; + function = "pwm0"; + }; + }; + }; + + fragment@3 { + target = <&pwm>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&pwm0_pin>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spdif-out.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spdif-out.dtso new file mode 100644 index 000000000000..65bc51b0218e --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spdif-out.dtso @@ -0,0 +1,38 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target = <&spdif>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&spdif_tx_pin>; + status = "okay"; + }; + }; + + fragment@1 { + target-path = "/"; + __overlay__ { + sound { + compatible = "simple-audio-card"; + simple-audio-card,name = "On-board SPDIF"; + + simple-audio-card,cpu { + sound-dai = <&spdif>; + }; + + simple-audio-card,codec { + sound-dai = <&spdif_out>; + }; + }; + + spdif_out: spdif-out { + #sound-dai-cells = <0>; + compatible = "linux,spdif-dit"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-add-cs1.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-add-cs1.dtso new file mode 100644 index 000000000000..8e3eab295f49 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-add-cs1.dtso @@ -0,0 +1,41 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target = <&pio>; + __overlay__ { + spi0_cs1: spi0_cs1 { + pins = "PA21"; + function = "gpio_out"; + output-high; + }; + + spi1_cs1: spi1_cs1 { + pins = "PA10"; + function = "gpio_out"; + output-high; + }; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + pinctrl-names = "default", "default"; + pinctrl-1 = <&spi0_cs1>; + cs-gpios = <0>, <&pio 0 21 0>; /* PA21 */ + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + pinctrl-names = "default", "default"; + pinctrl-1 = <&spi1_cs1>; + cs-gpios = <0>, <&pio 0 10 0>; /* PA10 */ + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-jedec-nor.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-jedec-nor.dtso new file mode 100644 index 000000000000..5a45808c11a5 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-jedec-nor.dtso @@ -0,0 +1,42 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc/spi@1c68000"; + spi1 = "/soc/spi@1c69000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <1000000>; + status = "disabled"; + }; + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <1000000>; + status = "disabled"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-spidev.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-spidev.dtso new file mode 100644 index 000000000000..69a14b2c60e4 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-spi-spidev.dtso @@ -0,0 +1,42 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc/spi@1c68000"; + spi1 = "/soc/spi@1c69000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart1.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart1.dtso new file mode 100644 index 000000000000..92e3eb4d9b66 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart1.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial1 = "/soc/serial@1c28400"; + }; + }; + + fragment@1 { + target = <&uart1>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart2.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart2.dtso new file mode 100644 index 000000000000..92bee1a9600a --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart2.dtso @@ -0,0 +1,32 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial2 = "/soc/serial@1c28800"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + uart2_rts_cts: uart2-rts-cts-pins { + pins = "PA2", "PA3"; + function = "uart2"; + }; + }; + }; + + fragment@2 { + target = <&uart2>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart3.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart3.dtso new file mode 100644 index 000000000000..a2197f1668fb --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-uart3.dtso @@ -0,0 +1,32 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial3 = "/soc/serial@1c28c00"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + uart3_rts_cts: uart3-rts-cts-pins { + pins = "PA15", "PA16"; + function = "uart3"; + }; + }; + }; + + fragment@2 { + target = <&uart3>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost0.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost0.dtso new file mode 100644 index 000000000000..c1d79c232fa4 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost0.dtso @@ -0,0 +1,27 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target = <&ehci0>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@1 { + target = <&ohci0>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@2 { + target = <&usbphy>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost1.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost1.dtso new file mode 100644 index 000000000000..2b4f245bf297 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost1.dtso @@ -0,0 +1,27 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target = <&ehci1>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@1 { + target = <&ohci1>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@2 { + target = <&usbphy>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost2.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost2.dtso new file mode 100644 index 000000000000..54800e729538 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost2.dtso @@ -0,0 +1,27 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target = <&ehci2>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@1 { + target = <&ohci2>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@2 { + target = <&usbphy>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost3.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost3.dtso new file mode 100644 index 000000000000..a99524ea38f3 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-usbhost3.dtso @@ -0,0 +1,27 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target = <&ehci3>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@1 { + target = <&ohci3>; + __overlay__ { + status = "okay"; + }; + }; + + fragment@2 { + target = <&usbphy>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-w1-gpio.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-w1-gpio.dtso new file mode 100644 index 000000000000..6e99626ac660 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h5-w1-gpio.dtso @@ -0,0 +1,29 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h5"; + + fragment@0 { + target = <&pio>; + __overlay__ { + w1_pins: w1_pins { + pins = "PD14"; + function = "gpio_in"; + }; + }; + }; + + fragment@1 { + target-path = "/"; + __overlay__ { + onewire@0 { + compatible = "w1-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&w1_pins>; + gpios = <&pio 3 14 0>; /* PD14 */ + status = "okay"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-fixup.scr-cmd b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-fixup.scr-cmd new file mode 100644 index 000000000000..d8e79ba4531b --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-fixup.scr-cmd @@ -0,0 +1,110 @@ +# overlays fixup script +# implements (or rather substitutes) overlay arguments functionality +# using u-boot scripting, environment variables and "fdt" command + +# setexpr test_var ${tmp_bank} - A +# works only for hex numbers (A-F) + +setenv decompose_pin 'setexpr tmp_bank sub "P(A|C|D|G)\\d+" "\\1"; +setexpr tmp_pin sub "P\\S(\\d+)" "\\1"; +test "${tmp_bank}" = "A" && setenv tmp_bank 0; +test "${tmp_bank}" = "C" && setenv tmp_bank 2; +test "${tmp_bank}" = "D" && setenv tmp_bank 3; +test "${tmp_bank}" = "G" && setenv tmp_bank 6' + +if test -n "${param_spinor_spi_bus}"; then + test "${param_spinor_spi_bus}" = "0" && setenv tmp_spi_path "spi@5010000" + test "${param_spinor_spi_bus}" = "1" && setenv tmp_spi_path "spi@5011000" + fdt set /soc/${tmp_spi_path} status "okay" + fdt set /soc/${tmp_spi_path}/spiflash@0 status "okay" + if test -n "${param_spinor_max_freq}"; then + fdt set /soc/${tmp_spi_path}/spiflash@0 spi-max-frequency "<${param_spinor_max_freq}>" + fi + if test "${param_spinor_spi_cs}" = "1"; then + fdt set /soc/${tmp_spi_path}/spiflash@0 reg "<1>" + fi + env delete tmp_spi_path +fi + +if test -n "${param_spidev_spi_bus}"; then + test "${param_spidev_spi_bus}" = "0" && setenv tmp_spi_path "spi@5010000" + test "${param_spidev_spi_bus}" = "1" && setenv tmp_spi_path "spi@5011000" + fdt set /soc/${tmp_spi_path} status "okay" + fdt set /soc/${tmp_spi_path}/spidev status "okay" + if test -n "${param_spidev_max_freq}"; then + fdt set /soc/${tmp_spi_path}/spidev spi-max-frequency "<${param_spidev_max_freq}>" + fi + if test "${param_spidev_spi_cs}" = "1"; then + fdt set /soc/${tmp_spi_path}/spidev reg "<1>" + fi + env delete tmp_spi_path +fi + +if test -n "${param_pps_pin}"; then + setenv tmp_bank "${param_pps_pin}" + setenv tmp_pin "${param_pps_pin}" + run decompose_pin + fdt set /soc/pinctrl@300b000/pps_pins pins "${param_pps_pin}" + fdt get value tmp_phandle /soc/pinctrl@300b000 phandle + fdt set /pps@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>" + env delete tmp_pin tmp_bank tmp_phandle +fi + +if test "${param_pps_falling_edge}" = "1"; then + fdt set /pps@0 assert-falling-edge +fi + +for f in ${overlays}; do + if test "${f}" = "pwm"; then + setenv bootargs_new "" + for arg in ${bootargs}; do + if test "${arg}" = "console=ttyS0,115200"; then + echo "Warning: Disabling ttyS0 console due to enabled PWM overlay" + else + setenv bootargs_new "${bootargs_new} ${arg}" + fi + done + setenv bootargs "${bootargs_new}" + fi +done + +if test -n "${param_w1_pin}"; then + setenv tmp_bank "${param_w1_pin}" + setenv tmp_pin "${param_w1_pin}" + run decompose_pin + fdt set /soc/pinctrl@300b000/w1_pins pins "${param_w1_pin}" + fdt get value tmp_phandle /soc/pinctrl@300b000 phandle + fdt set /onewire@0 gpios "<${tmp_phandle} ${tmp_bank} ${tmp_pin} 0>" + env delete tmp_pin tmp_bank tmp_phandle +fi + +if test "${param_w1_pin_int_pullup}" = "1"; then + fdt set /soc/pinctrl@300b000/w1_pins bias-pull-up +fi + +if test "${param_uart1_rtscts}" = "1"; then + fdt get value tmp_phandle1 /soc/pinctrl@300b000/uart1-pins phandle + fdt get value tmp_phandle2 /soc/pinctrl@300b000/uart1-rts-cts-pins phandle + fdt set /soc/serial@5000400 pinctrl-names "default" "default" + fdt set /soc/serial@5000400 pinctrl-0 "<${tmp_phandle1}>" + fdt set /soc/serial@5000400 pinctrl-1 "<${tmp_phandle2}>" + env delete tmp_phandle1 tmp_phandle2 +fi + +if test "${param_uart2_rtscts}" = "1"; then + fdt get value tmp_phandle1 /soc/pinctrl@300b000/uart2-pins phandle + fdt get value tmp_phandle2 /soc/pinctrl@300b000/uart2-rts-cts-pins phandle + fdt set /soc/serial@5000800 pinctrl-names "default" "default" + fdt set /soc/serial@5000800 pinctrl-0 "<${tmp_phandle1}>" + fdt set /soc/serial@5000800 pinctrl-1 "<${tmp_phandle2}>" + env delete tmp_phandle1 tmp_phandle2 +fi + +if test "${param_uart3_rtscts}" = "1"; then + fdt get value tmp_phandle1 /soc/pinctrl@300b000/uart3-pins phandle + fdt get value tmp_phandle2 /soc/pinctrl@300b000/uart3-rts-cts-pins phandle + fdt set /soc/serial@5000c00 pinctrl-names "default" "default" + fdt set /soc/serial@5000c00 pinctrl-0 "<${tmp_phandle1}>" + fdt set /soc/serial@5000c00 pinctrl-1 "<${tmp_phandle2}>" + env delete tmp_phandle1 tmp_phandle2 +fi diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-i2c0.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-i2c0.dtso new file mode 100644 index 000000000000..7e7ee8c46e9c --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-i2c0.dtso @@ -0,0 +1,20 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h6"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c0 = "/soc/i2c@5002000"; + }; + }; + + fragment@1 { + target = <&i2c0>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-i2c1.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-i2c1.dtso new file mode 100644 index 000000000000..111769821262 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-i2c1.dtso @@ -0,0 +1,20 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h6"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c1 = "/soc/i2c@5002400"; + }; + }; + + fragment@1 { + target = <&i2c1>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-i2c2.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-i2c2.dtso new file mode 100644 index 000000000000..b627529c2144 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-i2c2.dtso @@ -0,0 +1,20 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h6"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + i2c2 = "/soc/i2c@5002800"; + }; + }; + + fragment@1 { + target = <&i2c2>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-ruart.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-ruart.dtso new file mode 100644 index 000000000000..6430cb083370 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-ruart.dtso @@ -0,0 +1,13 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h6"; + + fragment@0 { + target = <&r_uart>; + __overlay__ { + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-spi-add-cs1.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-spi-add-cs1.dtso new file mode 100644 index 000000000000..0fa060fa1eff --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-spi-add-cs1.dtso @@ -0,0 +1,41 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h6"; + + fragment@0 { + target = <&pio>; + __overlay__ { + spi0_cs1: spi0_cs1 { + pins = "PA10"; + function = "gpio_out"; + output-high; + }; + + spi1_cs1: spi1_cs1 { + pins = "PA21"; + function = "gpio_out"; + output-high; + }; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + pinctrl-names = "default", "default"; + pinctrl-1 = <&spi0_cs1>; + cs-gpios = <0>, <&pio 0 10 0>; /* PA10 */ + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + pinctrl-names = "default", "default"; + pinctrl-1 = <&spi1_cs1>; + cs-gpios = <0>, <&pio 0 21 0>; /* PA21 */ + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-spi-jedec-nor.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-spi-jedec-nor.dtso new file mode 100644 index 000000000000..4f81dbb9924c --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-spi-jedec-nor.dtso @@ -0,0 +1,42 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h6"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc/spi@5010000"; + spi1 = "/soc/spi@5011000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <1000000>; + status = "disabled"; + }; + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spiflash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <1000000>; + status = "disabled"; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-spi-spidev.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-spi-spidev.dtso new file mode 100644 index 000000000000..1f077ea80ae5 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-spi-spidev.dtso @@ -0,0 +1,42 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3-spi"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + spi0 = "/soc/spi@5010000"; + spi1 = "/soc/spi@5011000"; + }; + }; + + fragment@1 { + target = <&spi0>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; + + fragment@2 { + target = <&spi1>; + __overlay__ { + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + status = "disabled"; + reg = <0>; + spi-max-frequency = <1000000>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-spi-spidev1.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-spi-spidev1.dtso new file mode 100644 index 000000000000..5e6b70530fae --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-spi-spidev1.dtso @@ -0,0 +1,30 @@ +// Enable the spidev interface +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun8i-h3-spi"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + /* Path to the SPI controller nodes */ + spi1 = "/soc/spi@5011000"; + }; + }; + fragment@1 { + target = <&spi1>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&spi1_pins>; + status = "okay"; + #address-cells = <1>; + #size-cells = <0>; + spidev@0 { + compatible = "armbian,spi-dev"; + reg = <0x0>; + spi-max-frequency = <1000000>; + }; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-uart1.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-uart1.dtso new file mode 100644 index 000000000000..44aa94efdad1 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-uart1.dtso @@ -0,0 +1,22 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h6"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial1 = "/soc/serial@5000400"; + }; + }; + + fragment@1 { + target = <&uart1>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart1_pins>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-uart2.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-uart2.dtso new file mode 100644 index 000000000000..bf9174bcd2e6 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-uart2.dtso @@ -0,0 +1,32 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h6"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial2 = "/soc/serial@5000800"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + uart2_rts_cts: uart2-rts-cts-pins { + pins = "PD21", "PD22"; + function = "uart2"; + }; + }; + }; + + fragment@2 { + target = <&uart2>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart2_pins>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-uart3.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-uart3.dtso new file mode 100644 index 000000000000..418edc14a0e4 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-uart3.dtso @@ -0,0 +1,32 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h6"; + + fragment@0 { + target-path = "/aliases"; + __overlay__ { + serial3 = "/soc/serial@5000c00"; + }; + }; + + fragment@1 { + target = <&pio>; + __overlay__ { + uart3_rts_cts: uart3-rts-cts-pins { + pins = "PD25", "PD26"; + function = "uart3"; + }; + }; + }; + + fragment@2 { + target = <&uart3>; + __overlay__ { + pinctrl-names = "default"; + pinctrl-0 = <&uart3_pins>; + status = "okay"; + }; + }; +}; diff --git a/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-w1-gpio.dtso b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-w1-gpio.dtso new file mode 100644 index 000000000000..3043c87780e4 --- /dev/null +++ b/arch/arm64/boot/dts/allwinner/overlay/sun50i-h6-w1-gpio.dtso @@ -0,0 +1,29 @@ +/dts-v1/; +/plugin/; + +/ { + compatible = "allwinner,sun50i-h6"; + + fragment@0 { + target = <&pio>; + __overlay__ { + w1_pins: w1_pins { + pins = "PC9"; + function = "gpio_in"; + }; + }; + }; + + fragment@1 { + target-path = "/"; + __overlay__ { + onewire@0 { + compatible = "w1-gpio"; + pinctrl-names = "default"; + pinctrl-0 = <&w1_pins>; + gpios = <&pio 2 9 0>; /* PC9 */ + status = "okay"; + }; + }; + }; +}; -- Armbian