From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: Philipp Rossak <embed3d@gmail.com>
Date: Wed, 24 Jan 2018 17:28:02 +0100
Subject: drv:iio:adc:sun4i-gpadc-iio: add A80 thermal sensor

This patch adds support for the A80 ths sensor.

The A80 has 4 sensors and supports interrupts. The interrupt is configured to update
the sensor values every second. The A80 shares some registers with the
integrated GPADC. ACQ0 must be set in the GPADC register with the offset
0x00. In fact the GPADC and the THS use the same register base and also
the same clocks and resets.

Signed-off-by: Philipp Rossak <embed3d@gmail.com>
---
 drivers/iio/adc/sun4i-gpadc-iio.c | 46 ++++++++++
 1 file changed, 46 insertions(+)

diff --git a/drivers/iio/adc/sun4i-gpadc-iio.c b/drivers/iio/adc/sun4i-gpadc-iio.c
index 6c1b09401fe0..f14b9c91737e 100644
--- a/drivers/iio/adc/sun4i-gpadc-iio.c
+++ b/drivers/iio/adc/sun4i-gpadc-iio.c
@@ -200,6 +200,48 @@ static const struct gpadc_data sun8i_a83t_ths_data = {
 		SUNXI_THS_TEMP_PERIOD(0x257),
 };
 
+static const struct gpadc_data sun9i_a80_ths_data = {
+	.temp_offset = -2794,
+	.temp_scale = -67,
+	.temp_data = {SUNXI_THS_TDATA0,
+		SUNXI_THS_TDATA1,
+		SUNXI_THS_TDATA2,
+		SUNXI_THS_TDATA3},
+	.sample_start = sunxi_ths_sample_start,
+	.sample_end = sunxi_ths_sample_end,
+	.has_bus_clk = true,
+	.has_bus_rst = true,
+	.has_mod_clk = true,
+	.sensor_count = 4,
+	.supports_nvmem = false,
+	.support_irq = true,
+	.ctrl0_map = SUNXI_THS_ACQ0(0x1f3),
+	.ctrl2_map = SUNXI_THS_TEMP_SENSE_EN0 |
+		SUNXI_THS_TEMP_SENSE_EN1 |
+		SUNXI_THS_TEMP_SENSE_EN2 |
+		SUNXI_THS_TEMP_SENSE_EN3 |
+		SUNXI_THS_ACQ1(0x1f3),
+	.filter_map = SUNXI_THS_FILTER_EN |
+		SUNXI_THS_FILTER_TYPE(0x2),
+	.irq_clear_map = SUNXI_THS_INTS_ALARM_INT_0 |
+		SUNXI_THS_INTS_ALARM_INT_1 |
+		SUNXI_THS_INTS_ALARM_INT_2 |
+		SUNXI_THS_INTS_ALARM_INT_3 |
+		SUNXI_THS_INTS_SHUT_INT_0  |
+		SUNXI_THS_INTS_SHUT_INT_1  |
+		SUNXI_THS_INTS_SHUT_INT_2  |
+		SUNXI_THS_INTS_SHUT_INT_3  |
+		SUNXI_THS_INTS_TDATA_IRQ_0 |
+		SUNXI_THS_INTS_TDATA_IRQ_1 |
+		SUNXI_THS_INTS_TDATA_IRQ_2 |
+		SUNXI_THS_INTS_TDATA_IRQ_3,
+	.irq_control_map = SUNXI_THS_INTC_TDATA_IRQ_EN0 |
+		SUNXI_THS_INTC_TDATA_IRQ_EN1 |
+		SUNXI_THS_INTC_TDATA_IRQ_EN2 |
+		SUNXI_THS_INTC_TDATA_IRQ_EN3 |
+		SUNXI_THS_TEMP_PERIOD(0x3a),
+};
+
 struct sun4i_gpadc_iio {
 	struct iio_dev			*indio_dev;
 	struct completion		completion;
@@ -704,6 +746,10 @@ static const struct of_device_id sun4i_gpadc_of_id[] = {
 		.compatible = "allwinner,sun8i-a83t-ths",
 		.data = &sun8i_a83t_ths_data,
 	},
+	{
+		.compatible = "allwinner,sun9i-a80-ths",
+		.data = &sun9i_a80_ths_data,
+	},
 	{ /* sentinel */ }
 };
 
-- 
Armbian

