From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001
From: FantasyGmm <16450052+FantasyGmm@users.noreply.github.com>
Date: Mon, 29 Jan 2024 19:05:12 +0800
Subject: Patching kernel arm64 files drivers/gpu/drm/panel/Kconfig
 drivers/gpu/drm/panel/Makefile drivers/gpu/drm/panel/panel-xiaomi-umi-csot.c

Signed-off-by: FantasyGmm <16450052+FantasyGmm@users.noreply.github.com>
---
 drivers/gpu/drm/panel/Kconfig                 |   9 +
 drivers/gpu/drm/panel/Makefile                |   1 +
 drivers/gpu/drm/panel/panel-xiaomi-umi-csot.c | 416 ++++++++++
 3 files changed, 426 insertions(+)

diff --git a/drivers/gpu/drm/panel/Kconfig b/drivers/gpu/drm/panel/Kconfig
index 99e14dc212ec..2ab846e5cfaf 100644
--- a/drivers/gpu/drm/panel/Kconfig
+++ b/drivers/gpu/drm/panel/Kconfig
@@ -8,6 +8,15 @@ config DRM_PANEL
 menu "Display Panels"
 	depends on DRM && DRM_PANEL
 
+config DRM_PANEL_XIAOMI_UMI_CSOT
+	tristate "Xiaomi Mi 10 (umi) 1080x2340 CSOT AMOLED panel"
+	depends on OF
+	depends on DRM_MIPI_DSI
+	depends on BACKLIGHT_CLASS_DEVICE
+	help
+	  Say Y here if you want to enable support for the CSOT 1080x2340
+	  dsc cmd mode panel as found in Xiaomi Mi 10 devices.
+
 config DRM_PANEL_ABT_Y030XX067A
 	tristate "ABT Y030XX067A 320x480 LCD panel"
 	depends on OF && SPI
diff --git a/drivers/gpu/drm/panel/Makefile b/drivers/gpu/drm/panel/Makefile
index d10c3de51c6d..687a239df8b1 100644
--- a/drivers/gpu/drm/panel/Makefile
+++ b/drivers/gpu/drm/panel/Makefile
@@ -88,3 +88,4 @@ obj-$(CONFIG_DRM_PANEL_VISIONOX_VTDR6130) += panel-visionox-vtdr6130.o
 obj-$(CONFIG_DRM_PANEL_VISIONOX_R66451) += panel-visionox-r66451.o
 obj-$(CONFIG_DRM_PANEL_WIDECHIPS_WS2401) += panel-widechips-ws2401.o
 obj-$(CONFIG_DRM_PANEL_XINPENG_XPP055C272) += panel-xinpeng-xpp055c272.o
+obj-$(CONFIG_DRM_PANEL_XIAOMI_UMI_CSOT) += panel-xiaomi-umi-csot.o
diff --git a/drivers/gpu/drm/panel/panel-xiaomi-umi-csot.c b/drivers/gpu/drm/panel/panel-xiaomi-umi-csot.c
new file mode 100644
index 000000000000..5e1d3ec9c08d
--- /dev/null
+++ b/drivers/gpu/drm/panel/panel-xiaomi-umi-csot.c
@@ -0,0 +1,416 @@
+// SPDX-License-Identifier: GPL-2.0-only
+// Copyright (c) 2024 FIXME
+// Generated with linux-mdss-dsi-panel-driver-generator from vendor device tree:
+//   Copyright (c) 2013, The Linux Foundation. All rights reserved. (FIXME)
+
+#include <linux/backlight.h>
+#include <linux/delay.h>
+#include <linux/gpio/consumer.h>
+#include <linux/module.h>
+#include <linux/of.h>
+
+#include <video/mipi_display.h>
+
+#include <drm/display/drm_dsc.h>
+#include <drm/display/drm_dsc_helper.h>
+#include <drm/drm_mipi_dsi.h>
+#include <drm/drm_modes.h>
+#include <drm/drm_panel.h>
+
+struct xiaomi_umi_csot {
+	struct drm_panel panel;
+	struct mipi_dsi_device *dsi;
+	struct drm_dsc_config dsc;
+	struct gpio_desc *reset_gpio;
+	bool prepared;
+};
+
+static inline
+struct xiaomi_umi_csot *to_xiaomi_umi_csot(struct drm_panel *panel)
+{
+	return container_of(panel, struct xiaomi_umi_csot, panel);
+}
+
+static void xiaomi_umi_csot_reset(struct xiaomi_umi_csot *ctx)
+{
+	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+	usleep_range(1000, 2000);
+	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+	usleep_range(1000, 2000);
+	gpiod_set_value_cansleep(ctx->reset_gpio, 0);
+	usleep_range(10000, 11000);
+}
+
+static int xiaomi_umi_csot_on(struct xiaomi_umi_csot *ctx)
+{
+	struct mipi_dsi_device *dsi = ctx->dsi;
+	struct device *dev = &dsi->dev;
+	int ret;
+
+	mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x07);
+	mipi_dsi_dcs_write_seq(dsi, 0xc0, 0x10);
+	mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x03);
+	mipi_dsi_dcs_write_seq(dsi, 0xd4, 0x00);
+	mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
+	mipi_dsi_dcs_write_seq(dsi, 0x6f, 0x01);
+	mipi_dsi_dcs_write_seq(dsi, 0xb5, 0x00);
+	mipi_dsi_dcs_write_seq(dsi, 0x6f, 0x01);
+	mipi_dsi_dcs_write_seq(dsi, 0xc0, 0x33);
+	mipi_dsi_dcs_write_seq(dsi, 0xb2, 0x58, 0x00, 0x08, 0x08);
+	mipi_dsi_dcs_write_seq(dsi, 0x6f, 0x01);
+	mipi_dsi_dcs_write_seq(dsi, 0xca, 0x30);
+	mipi_dsi_dcs_write_seq(dsi, 0xb5, 0x80);
+	mipi_dsi_dcs_write_seq(dsi, 0x6f, 0x01);
+	mipi_dsi_dcs_write_seq(dsi, 0xc6, 0x13);
+	mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x01);
+	mipi_dsi_dcs_write_seq(dsi, 0x6f, 0x01);
+	mipi_dsi_dcs_write_seq(dsi, 0xd2, 0x00, 0x12, 0x61, 0x25, 0x43, 0x07);
+	mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e, 0x1e);
+	mipi_dsi_dcs_write_seq(dsi, 0xb8, 0x48, 0x48, 0x48, 0x48);
+	mipi_dsi_dcs_write_seq(dsi, 0x6f, 0x01);
+	mipi_dsi_dcs_write_seq(dsi, 0xb3, 0x13);
+	mipi_dsi_dcs_write_seq(dsi, 0x6f, 0x01);
+	mipi_dsi_dcs_write_seq(dsi, 0xb4, 0x13);
+	mipi_dsi_dcs_write_seq(dsi, 0xcd, 0x05, 0x61);
+	mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x05);
+	mipi_dsi_dcs_write_seq(dsi, 0xb3, 0x88, 0x80);
+	mipi_dsi_dcs_write_seq(dsi, 0xb5, 0x04, 0x01);
+	mipi_dsi_dcs_write_seq(dsi, 0xb7, 0x04, 0x00, 0x00, 0x01);
+	mipi_dsi_dcs_write_seq(dsi, 0xb8, 0x04, 0x00, 0x00, 0x01);
+	mipi_dsi_dcs_write_seq(dsi, 0xff, 0xaa, 0x55, 0xa5, 0x81);
+	mipi_dsi_dcs_write_seq(dsi, 0x6f, 0x0d);
+	mipi_dsi_dcs_write_seq(dsi, 0xf3, 0xab);
+	mipi_dsi_dcs_write_seq(dsi, 0x6f, 0x05);
+	mipi_dsi_dcs_write_seq(dsi, 0xfd, 0x00, 0xda);
+	mipi_dsi_dcs_write_seq(dsi, 0xff, 0xaa, 0x55, 0xa5, 0x80);
+	mipi_dsi_dcs_write_seq(dsi, 0x6f, 0x0a);
+	mipi_dsi_dcs_write_seq(dsi, 0xfc, 0x02);
+	mipi_dsi_dcs_write_seq(dsi, 0x6f, 0x36);
+	mipi_dsi_dcs_write_seq(dsi, 0xf6, 0x42);
+	mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x00, 0x00);
+	mipi_dsi_dcs_write_seq(dsi, 0x3b, 0x00, 0x0c, 0x00, 0x04);
+	mipi_dsi_dcs_write_seq(dsi, 0x90, 0x01);
+	mipi_dsi_dcs_write_seq(dsi, 0x93,
+			       0x89, 0x28, 0x00, 0x0c, 0x02, 0x00, 0x02, 0x0e,
+			       0x01, 0x1f, 0x00, 0x07, 0x08, 0xbb, 0x08, 0x7a,
+			       0x10, 0xf0);
+	mipi_dsi_dcs_write_seq(dsi, 0x03, 0x11);
+	mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_MEMORY_START);
+
+	ret = mipi_dsi_dcs_set_tear_on(dsi, MIPI_DSI_DCS_TEAR_MODE_VBLANK);
+	if (ret < 0) {
+		dev_err(dev, "Failed to set tear on: %d\n", ret);
+		return ret;
+	}
+
+	mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_WRITE_CONTROL_DISPLAY, 0x20);
+	mipi_dsi_dcs_write_seq(dsi, 0x51, 0x00, 0x00, 0x00, 0x00);
+
+	ret = mipi_dsi_dcs_set_column_address(dsi, 0x0000, 0x0437);
+	if (ret < 0) {
+		dev_err(dev, "Failed to set column address: %d\n", ret);
+		return ret;
+	}
+
+	ret = mipi_dsi_dcs_set_page_address(dsi, 0x0000, 0x0923);
+	if (ret < 0) {
+		dev_err(dev, "Failed to set page address: %d\n", ret);
+		return ret;
+	}
+
+	mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
+	mipi_dsi_dcs_write_seq(dsi, 0xb4,
+			       0xcb, 0xbb, 0xbb, 0xaa, 0x99, 0x77, 0x66, 0x00,
+			       0x00, 0x00, 0xb4, 0xd0, 0xd0, 0xd0, 0xd0, 0xd0,
+			       0x86, 0x86, 0x3c, 0x3c, 0xf2, 0xf2, 0xa8, 0xa8,
+			       0x36, 0x36, 0x36, 0x36, 0x0a);
+	mipi_dsi_dcs_write_seq(dsi, 0x2f, 0x01);
+	mipi_dsi_dcs_write_seq(dsi, MIPI_DCS_SET_GAMMA_CURVE, 0x01);
+
+	ret = mipi_dsi_dcs_exit_sleep_mode(dsi);
+	if (ret < 0) {
+		dev_err(dev, "Failed to exit sleep mode: %d\n", ret);
+		return ret;
+	}
+	msleep(100);
+
+	ret = mipi_dsi_dcs_set_display_on(dsi);
+	if (ret < 0) {
+		dev_err(dev, "Failed to set display on: %d\n", ret);
+		return ret;
+	}
+
+	mipi_dsi_dcs_write_seq(dsi, 0xf0, 0x55, 0xaa, 0x52, 0x08, 0x00);
+	mipi_dsi_dcs_write_seq(dsi, 0xb5, 0x84);
+
+	return 0;
+}
+
+static int xiaomi_umi_csot_off(struct xiaomi_umi_csot *ctx)
+{
+	struct mipi_dsi_device *dsi = ctx->dsi;
+	struct device *dev = &dsi->dev;
+	int ret;
+
+	ret = mipi_dsi_dcs_set_display_off(dsi);
+	if (ret < 0) {
+		dev_err(dev, "Failed to set display off: %d\n", ret);
+		return ret;
+	}
+
+	ret = mipi_dsi_dcs_enter_sleep_mode(dsi);
+	if (ret < 0) {
+		dev_err(dev, "Failed to enter sleep mode: %d\n", ret);
+		return ret;
+	}
+	msleep(120);
+
+	return 0;
+}
+
+static int xiaomi_umi_csot_prepare(struct drm_panel *panel)
+{
+	struct xiaomi_umi_csot *ctx = to_xiaomi_umi_csot(panel);
+	struct device *dev = &ctx->dsi->dev;
+	struct drm_dsc_picture_parameter_set pps;
+	int ret;
+
+	if (ctx->prepared)
+		return 0;
+
+	xiaomi_umi_csot_reset(ctx);
+
+	ret = xiaomi_umi_csot_on(ctx);
+	if (ret < 0) {
+		dev_err(dev, "Failed to initialize panel: %d\n", ret);
+		gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+		return ret;
+	}
+
+	drm_dsc_pps_payload_pack(&pps, &ctx->dsc);
+
+	ret = mipi_dsi_picture_parameter_set(ctx->dsi, &pps);
+	if (ret < 0) {
+		dev_err(panel->dev, "failed to transmit PPS: %d\n", ret);
+		return ret;
+	}
+
+	ret = mipi_dsi_compression_mode(ctx->dsi, true);
+	if (ret < 0) {
+		dev_err(dev, "failed to enable compression mode: %d\n", ret);
+		return ret;
+	}
+
+	msleep(28); /* TODO: Is this panel-dependent? */
+
+	ctx->prepared = true;
+	return 0;
+}
+
+static int xiaomi_umi_csot_unprepare(struct drm_panel *panel)
+{
+	struct xiaomi_umi_csot *ctx = to_xiaomi_umi_csot(panel);
+	struct device *dev = &ctx->dsi->dev;
+	int ret;
+
+	if (!ctx->prepared)
+		return 0;
+
+	ret = xiaomi_umi_csot_off(ctx);
+	if (ret < 0)
+		dev_err(dev, "Failed to un-initialize panel: %d\n", ret);
+
+	gpiod_set_value_cansleep(ctx->reset_gpio, 1);
+
+	ctx->prepared = false;
+	return 0;
+}
+
+static const struct drm_display_mode xiaomi_umi_csot_mode = {
+	.clock = (1080 + 16 + 8 + 8) * (2340 + 600 + 32 + 560) * 60 / 1000,
+	.hdisplay = 1080,
+	.hsync_start = 1080 + 16,
+	.hsync_end = 1080 + 16 + 8,
+	.htotal = 1080 + 16 + 8 + 8,
+	.vdisplay = 2340,
+	.vsync_start = 2340 + 600,
+	.vsync_end = 2340 + 600 + 32,
+	.vtotal = 2340 + 600 + 32 + 560,
+	.width_mm = 710,
+	.height_mm = 1537,
+};
+
+static int xiaomi_umi_csot_get_modes(struct drm_panel *panel,
+					struct drm_connector *connector)
+{
+	struct drm_display_mode *mode;
+
+	mode = drm_mode_duplicate(connector->dev, &xiaomi_umi_csot_mode);
+	if (!mode)
+		return -ENOMEM;
+
+	drm_mode_set_name(mode);
+
+	mode->type = DRM_MODE_TYPE_DRIVER | DRM_MODE_TYPE_PREFERRED;
+	connector->display_info.width_mm = mode->width_mm;
+	connector->display_info.height_mm = mode->height_mm;
+	drm_mode_probed_add(connector, mode);
+
+	return 1;
+}
+
+static const struct drm_panel_funcs xiaomi_umi_csot_panel_funcs = {
+	.prepare = xiaomi_umi_csot_prepare,
+	.unprepare = xiaomi_umi_csot_unprepare,
+	.get_modes = xiaomi_umi_csot_get_modes,
+};
+
+static int xiaomi_umi_csot_bl_update_status(struct backlight_device *bl)
+{
+	struct mipi_dsi_device *dsi = bl_get_data(bl);
+	u16 brightness = backlight_get_brightness(bl);
+	int ret;
+
+	dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+	ret = mipi_dsi_dcs_set_display_brightness_large(dsi, brightness);
+	if (ret < 0)
+		return ret;
+
+	dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+	return 0;
+}
+
+// TODO: Check if /sys/class/backlight/.../actual_brightness actually returns
+// correct values. If not, remove this function.
+static int xiaomi_umi_csot_bl_get_brightness(struct backlight_device *bl)
+{
+	struct mipi_dsi_device *dsi = bl_get_data(bl);
+	u16 brightness;
+	int ret;
+
+	dsi->mode_flags &= ~MIPI_DSI_MODE_LPM;
+
+	ret = mipi_dsi_dcs_get_display_brightness_large(dsi, &brightness);
+	if (ret < 0)
+		return ret;
+
+	dsi->mode_flags |= MIPI_DSI_MODE_LPM;
+
+	return brightness;
+}
+
+static const struct backlight_ops xiaomi_umi_csot_bl_ops = {
+	.update_status = xiaomi_umi_csot_bl_update_status,
+	.get_brightness = xiaomi_umi_csot_bl_get_brightness,
+};
+
+static struct backlight_device *
+xiaomi_umi_csot_create_backlight(struct mipi_dsi_device *dsi)
+{
+	struct device *dev = &dsi->dev;
+	const struct backlight_properties props = {
+		.type = BACKLIGHT_RAW,
+		.brightness = 2047,
+		.max_brightness = 2047,
+	};
+
+	return devm_backlight_device_register(dev, dev_name(dev), dev, dsi,
+					      &xiaomi_umi_csot_bl_ops, &props);
+}
+
+static int xiaomi_umi_csot_probe(struct mipi_dsi_device *dsi)
+{
+	struct device *dev = &dsi->dev;
+	struct xiaomi_umi_csot *ctx;
+	int ret;
+
+	ctx = devm_kzalloc(dev, sizeof(*ctx), GFP_KERNEL);
+	if (!ctx)
+		return -ENOMEM;
+
+	ctx->reset_gpio = devm_gpiod_get(dev, "reset", GPIOD_OUT_HIGH);
+	if (IS_ERR(ctx->reset_gpio))
+		return dev_err_probe(dev, PTR_ERR(ctx->reset_gpio),
+				     "Failed to get reset-gpios\n");
+
+	ctx->dsi = dsi;
+	mipi_dsi_set_drvdata(dsi, ctx);
+
+	dsi->lanes = 4;
+	dsi->format = MIPI_DSI_FMT_RGB888;
+	dsi->mode_flags = MIPI_DSI_MODE_VIDEO_BURST |
+			  MIPI_DSI_CLOCK_NON_CONTINUOUS | MIPI_DSI_MODE_LPM;
+
+	drm_panel_init(&ctx->panel, dev, &xiaomi_umi_csot_panel_funcs,
+		       DRM_MODE_CONNECTOR_DSI);
+	ctx->panel.prepare_prev_first = true;
+
+	ctx->panel.backlight = xiaomi_umi_csot_create_backlight(dsi);
+	if (IS_ERR(ctx->panel.backlight))
+		return dev_err_probe(dev, PTR_ERR(ctx->panel.backlight),
+				     "Failed to create backlight\n");
+
+	drm_panel_add(&ctx->panel);
+
+	/* This panel only supports DSC; unconditionally enable it */
+	dsi->dsc = &ctx->dsc;
+
+	ctx->dsc.dsc_version_major = 1;
+	ctx->dsc.dsc_version_minor = 1;
+
+	/* TODO: Pass slice_per_pkt = 2 */
+	ctx->dsc.slice_height = 12;
+	ctx->dsc.slice_width = 540;
+	/*
+	 * TODO: hdisplay should be read from the selected mode once
+	 * it is passed back to drm_panel (in prepare?)
+	 */
+	WARN_ON(1080 % ctx->dsc.slice_width);
+	ctx->dsc.slice_count = 1080 / ctx->dsc.slice_width;
+	ctx->dsc.bits_per_component = 8;
+	ctx->dsc.bits_per_pixel = 8 << 4; /* 4 fractional bits */
+	ctx->dsc.block_pred_enable = true;
+
+	ret = mipi_dsi_attach(dsi);
+	if (ret < 0) {
+		dev_err(dev, "Failed to attach to DSI host: %d\n", ret);
+		drm_panel_remove(&ctx->panel);
+		return ret;
+	}
+
+	return 0;
+}
+
+static void xiaomi_umi_csot_remove(struct mipi_dsi_device *dsi)
+{
+	struct xiaomi_umi_csot *ctx = mipi_dsi_get_drvdata(dsi);
+	int ret;
+
+	ret = mipi_dsi_detach(dsi);
+	if (ret < 0)
+		dev_err(&dsi->dev, "Failed to detach from DSI host: %d\n", ret);
+
+	drm_panel_remove(&ctx->panel);
+}
+
+static const struct of_device_id xiaomi_umi_csot_of_match[] = {
+	{ .compatible = "mdss,xiaomi-umi-csot" },
+	{ /* sentinel */ }
+};
+MODULE_DEVICE_TABLE(of, xiaomi_umi_csot_of_match);
+
+static struct mipi_dsi_driver xiaomi_umi_csot_driver = {
+	.probe = xiaomi_umi_csot_probe,
+	.remove = xiaomi_umi_csot_remove,
+	.driver = {
+		.name = "panel-xiaomi-umi-csot",
+		.of_match_table = xiaomi_umi_csot_of_match,
+	},
+};
+module_mipi_dsi_driver(xiaomi_umi_csot_driver);
+
+MODULE_AUTHOR("linux-mdss-dsi-panel-driver-generator <fix@me>"); // FIXME
+MODULE_DESCRIPTION("DRM driver for xiaomi 42 02 0b cmd mode dsc dsi panel");
+MODULE_LICENSE("GPL");
-- 
Armbian