From be67c1f21ca1999b31bf4d63d35ca54b921617ba Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Sat, 10 Feb 2024 16:42:04 +0300 Subject: [PATCH 01/15] arm64: dts: rockchip: Add cpu regulators and vcc5v0_sys to Khadas Edge 2 This commit adds 5V fixed power regulator and CPU regulators to Khadas Edge 2. Signed-off-by: Muhammed Efe Cetin --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 81 +++++++++++++++++++ 1 file changed, 81 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index f53e993c785e..1d1ce70a0f3a 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -17,6 +17,87 @@ aliases { chosen { stdout-path = "serial2:1500000n8"; }; + + vcc5v0_sys: vcc5v0-sys-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; +}; + +&cpu_b0 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b1 { + cpu-supply = <&vdd_cpu_big0_s0>; +}; + +&cpu_b2 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_b3 { + cpu-supply = <&vdd_cpu_big1_s0>; +}; + +&cpu_l0 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l1 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l2 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&cpu_l3 { + cpu-supply = <&vdd_cpu_lit_s0>; +}; + +&i2c0 { + pinctrl-names = "default"; + pinctrl-0 = <&i2c0m2_xfer>; + status = "okay"; + + vdd_cpu_big0_s0: regulator@42 { + compatible = "rockchip,rk8602"; + reg = <0x42>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big0_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_big1_s0: regulator@43 { + compatible = "rockchip,rk8603", "rockchip,rk8602"; + reg = <0x43>; + fcs,suspend-voltage-selector = <1>; + regulator-name = "vdd_cpu_big1_s0"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <1050000>; + regulator-ramp-delay = <2300>; + vin-supply = <&vcc5v0_sys>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; }; &sdhci { -- 2.44.0 From 0d8f44792d18f46ea1f345a546d60263b2c9fcd1 Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Sat, 10 Feb 2024 17:04:20 +0300 Subject: [PATCH 02/15] arm64: dts: rockchip: Add PMIC to Khadas Edge 2 This commit adds PMIC to Khadas Edge 2 board. Signed-off-by: Muhammed Efe Cetin --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 335 ++++++++++++++++++ 1 file changed, 335 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index 1d1ce70a0f3a..b99d2b82c787 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -26,6 +26,16 @@ vcc5v0_sys: vcc5v0-sys-regulator { regulator-min-microvolt = <5000000>; regulator-max-microvolt = <5000000>; }; + + vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_1v1_nldo_s3"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1100000>; + regulator-max-microvolt = <1100000>; + vin-supply = <&vcc5v0_sys>; + }; }; &cpu_b0 { @@ -110,6 +120,331 @@ &sdhci { status = "okay"; }; +&spi2 { + status = "okay"; + assigned-clocks = <&cru CLK_SPI2>; + assigned-clock-rates = <200000000>; + pinctrl-names = "default"; + pinctrl-0 = <&spi2m2_cs0 &spi2m2_pins>; + num-cs = <1>; + + pmic@0 { + compatible = "rockchip,rk806"; + spi-max-frequency = <1000000>; + reg = <0x0>; + + interrupt-parent = <&gpio0>; + interrupts = <7 IRQ_TYPE_LEVEL_LOW>; + + pinctrl-names = "default"; + pinctrl-0 = <&pmic_pins>, <&rk806_dvs1_null>, + <&rk806_dvs2_null>, <&rk806_dvs3_null>; + + system-power-controller; + + vcc1-supply = <&vcc5v0_sys>; + vcc2-supply = <&vcc5v0_sys>; + vcc3-supply = <&vcc5v0_sys>; + vcc4-supply = <&vcc5v0_sys>; + vcc5-supply = <&vcc5v0_sys>; + vcc6-supply = <&vcc5v0_sys>; + vcc7-supply = <&vcc5v0_sys>; + vcc8-supply = <&vcc5v0_sys>; + vcc9-supply = <&vcc5v0_sys>; + vcc10-supply = <&vcc5v0_sys>; + vcc11-supply = <&vcc_2v0_pldo_s3>; + vcc12-supply = <&vcc5v0_sys>; + vcc13-supply = <&vcc_1v1_nldo_s3>; + vcc14-supply = <&vcc_1v1_nldo_s3>; + vcca-supply = <&vcc5v0_sys>; + + gpio-controller; + #gpio-cells = <2>; + + rk806_dvs1_null: dvs1-null-pins { + pins = "gpio_pwrctrl1"; + function = "pin_fun0"; + }; + + rk806_dvs2_null: dvs2-null-pins { + pins = "gpio_pwrctrl2"; + function = "pin_fun0"; + }; + + rk806_dvs3_null: dvs3-null-pins { + pins = "gpio_pwrctrl3"; + function = "pin_fun0"; + }; + + regulators { + vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_gpu_s0"; + regulator-enable-ramp-delay = <400>; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_cpu_lit_s0: vdd_cpu_lit_mem_s0: dcdc-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_cpu_lit_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_log_s0: dcdc-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <750000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_log_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_vdenc_s0: vdd_vdenc_mem_s0: dcdc-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <550000>; + regulator-max-microvolt = <950000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_vdenc_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_ddr_s0: dcdc-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <675000>; + regulator-max-microvolt = <900000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + vdd2_ddr_s3: dcdc-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vdd2_ddr_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_2v0_pldo_s3: dcdc-reg7 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <2000000>; + regulator-max-microvolt = <2000000>; + regulator-ramp-delay = <12500>; + regulator-name = "vdd_2v0_pldo_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <2000000>; + }; + }; + + vcc_3v3_s3: dcdc-reg8 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-name = "vcc_3v3_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vddq_ddr_s0: dcdc-reg9 { + regulator-always-on; + regulator-boot-on; + regulator-name = "vddq_ddr_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s3: dcdc-reg10 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avcc_1v8_s0: pldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "avcc_1v8_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_1v8_s0: pldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "vcc_1v8_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + avdd_1v2_s0: pldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1200000>; + regulator-max-microvolt = <1200000>; + regulator-name = "avdd_1v2_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vcc_3v3_s0: pldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <12500>; + regulator-name = "vcc_3v3_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vccio_sd_s0: pldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-ramp-delay = <12500>; + regulator-name = "vccio_sd_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + pldo6_s3: pldo-reg6 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-name = "pldo6_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_0v75_s3: nldo-reg1 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s3"; + + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <750000>; + }; + }; + + vdd_ddr_pll_s0: nldo-reg2 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdd_ddr_pll_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + regulator-suspend-microvolt = <850000>; + }; + }; + + avdd_0v75_s0: nldo-reg3 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "avdd_0v75_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v85_s0: nldo-reg4 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <850000>; + regulator-max-microvolt = <850000>; + regulator-name = "vdd_0v85_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + + vdd_0v75_s0: nldo-reg5 { + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <750000>; + regulator-max-microvolt = <750000>; + regulator-name = "vdd_0v75_s0"; + + regulator-state-mem { + regulator-off-in-suspend; + }; + }; + }; + }; +}; + &uart2 { pinctrl-0 = <&uart2m0_xfer>; status = "okay"; -- 2.44.0 From e9ce790b4417e944980fb07b119e35dc410787aa Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Sat, 10 Feb 2024 17:17:29 +0300 Subject: [PATCH 03/15] arm64: dts: rockchip: Add TF card to Khadas Edge 2 Add TF card support to Khadas Edge 2. The board exposes sdmmc pins via EXTIO. TF card can be used with IO module. Signed-off-by: Muhammed Efe Cetin --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 34 +++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index b99d2b82c787..856ce4f869a2 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -12,6 +12,7 @@ / { aliases { mmc0 = &sdhci; + mmc1 = &sdmmc; }; chosen { @@ -36,6 +37,19 @@ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { regulator-max-microvolt = <1100000>; vin-supply = <&vcc5v0_sys>; }; + + vdd_3v3_sd: vdd-3v3-sd-regulator { + compatible = "regulator-fixed"; + regulator-name = "vdd_3v3_sd"; + gpios = <&gpio1 RK_PB6 GPIO_ACTIVE_HIGH>; + regulator-boot-on; + enable-active-high; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_3v3_s3>; + pinctrl-names = "default"; + pinctrl-0 = <&vdd_sd_en>; + }; }; &cpu_b0 { @@ -110,6 +124,14 @@ regulator-state-mem { }; }; +&pinctrl { + vdd_sd { + vdd_sd_en: vdd-sd-en { + rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; +}; + &sdhci { bus-width = <8>; no-sdio; @@ -120,6 +142,18 @@ &sdhci { status = "okay"; }; +&sdmmc { + bus-width = <4>; + cap-sd-highspeed; + disable-wp; + no-mmc; + no-sdio; + sd-uhs-sdr104; + vmmc-supply = <&vdd_3v3_sd>; + vqmmc-supply = <&vccio_sd_s0>; + status = "okay"; +}; + &spi2 { status = "okay"; assigned-clocks = <&cru CLK_SPI2>; -- 2.44.0 From 9a69b86d39c109480282b28865da10210d0dd003 Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Sat, 10 Feb 2024 17:34:15 +0300 Subject: [PATCH 04/15] arm64: dts: rockchip: USB2, USB3 Host, PCIe2 to Khadas Edge 2 Khadas Edge 2 has 1x USB2 with hub, 1x USB3 Host and 1x USB-C. This commit adds support for PCIe2, USB3 Host and USB2. Signed-off-by: Muhammed Efe Cetin --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 97 +++++++++++++++++++ 1 file changed, 97 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index 856ce4f869a2..ea7f1bb7c908 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -38,6 +38,33 @@ vcc_1v1_nldo_s3: vcc-1v1-nldo-s3-regulator { vin-supply = <&vcc5v0_sys>; }; + vcc5v0_host: vcc5v0-host-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc5v0_host"; + regulator-boot-on; + regulator-always-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio1 RK_PB1 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&vcc5v0_host_en>; + vin-supply = <&vcc5v0_sys>; + }; + + vcc3v3_pcie_wl: vcc3v3-pcie-wl-regulator { + compatible = "regulator-fixed"; + enable-active-high; + gpios = <&gpio0 RK_PC4 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&pcie2_2_vcc3v3_en>; + regulator-name = "vcc3v3_pcie_wl"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + startup-delay-us = <5000>; + vin-supply = <&vcc5v0_sys>; + }; + vdd_3v3_sd: vdd-3v3-sd-regulator { compatible = "regulator-fixed"; regulator-name = "vdd_3v3_sd"; @@ -84,6 +111,14 @@ &cpu_l3 { cpu-supply = <&vdd_cpu_lit_s0>; }; +&combphy0_ps { + status = "okay"; +}; + +&combphy2_psu { + status = "okay"; +}; + &i2c0 { pinctrl-names = "default"; pinctrl-0 = <&i2c0m2_xfer>; @@ -130,6 +165,30 @@ vdd_sd_en: vdd-sd-en { rockchip,pins = <1 RK_PB6 RK_FUNC_GPIO &pcfg_pull_up>; }; }; + + pcie2 { + pcie2_2_rst: pcie2-2-rst { + rockchip,pins = <3 RK_PD1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + pcie2_2_vcc3v3_en: pcie2-2-vcc-en { + rockchip,pins = <0 RK_PC4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + vcc5v0_host_en: vcc5v0-host-en { + rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&pcie2x1l2 { + pinctrl-names = "default"; + pinctrl-0 = <&pcie2_2_rst>; + reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; + vpcie3v3-supply = <&vcc3v3_pcie_wl>; + status = "okay"; }; &sdhci { @@ -483,3 +542,41 @@ &uart2 { pinctrl-0 = <&uart2m0_xfer>; status = "okay"; }; + +&u2phy2 { + status = "okay"; +}; + +&u2phy2_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&u2phy3 { + status = "okay"; +}; + +&u2phy3_host { + phy-supply = <&vcc5v0_host>; + status = "okay"; +}; + +&usb_host0_ehci { + status = "okay"; +}; + +&usb_host0_ohci { + status = "okay"; +}; + +&usb_host1_ehci { + status = "okay"; +}; + +&usb_host1_ohci { + status = "okay"; +}; + +&usb_host2_xhci { + status = "okay"; +}; -- 2.44.0 From dc25037694ea30f3cdf53e7c9dd6906d75322bee Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Sat, 10 Feb 2024 18:13:56 +0300 Subject: [PATCH 05/15] arm64: dts: rockchip: Add ir receiver and leds to Khadas Edge 2 Khadas Edge 2 exposes IR receiver pins as same as TF card via EXTIO. The IR receiver is connected to MCU and SoC. The board also has 2 PWM RGB leds. One is controlled by MCU and the other is controlled by SoC. This commit adds support for the led controlled by SoC using pwm-leds. Signed-off-by: Muhammed Efe Cetin --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 66 +++++++++++++++++++ 1 file changed, 66 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index ea7f1bb7c908..5a3b52e62dce 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -4,6 +4,7 @@ #include #include +#include #include "rk3588s.dtsi" / { @@ -19,6 +20,47 @@ chosen { stdout-path = "serial2:1500000n8"; }; + ir-receiver { + compatible = "gpio-ir-receiver"; + gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&ir_receiver_pin>; + }; + + leds { + compatible = "pwm-leds"; + + red_led: led-0 { + label = "red_led"; + linux,default-trigger = "none"; + default-state = "off"; + function = LED_FUNCTION_INDICATOR; + color = ; + max-brightness = <255>; + pwms = <&pwm11 0 25000 0>; + }; + + green_led: led-1 { + label = "green_led"; + linux,default-trigger = "default-on"; + default-state = "on"; + function = LED_FUNCTION_POWER; + color = ; + max-brightness = <255>; + pwms = <&pwm14 0 25000 0>; + }; + + blue_led: led-2 { + label = "blue_led"; + linux,default-trigger = "none"; + default-state = "off"; + function = LED_FUNCTION_INDICATOR; + color = ; + max-brightness = <255>; + pwms = <&pwm15 0 25000 0>; + }; + }; + vcc5v0_sys: vcc5v0-sys-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; @@ -181,6 +223,12 @@ vcc5v0_host_en: vcc5v0-host-en { rockchip,pins = <1 RK_PB1 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + ir-receiver { + ir_receiver_pin: ir-receiver-pin { + rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; }; &pcie2x1l2 { @@ -191,6 +239,24 @@ &pcie2x1l2 { status = "okay"; }; +&pwm11 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm11m1_pins>; + status = "okay"; +}; + +&pwm14 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm14m1_pins>; + status = "okay"; +}; + +&pwm15 { + pinctrl-names = "default"; + pinctrl-0 = <&pwm15m1_pins>; + status = "okay"; +}; + &sdhci { bus-width = <8>; no-sdio; -- 2.44.0 From 00a9a83df937c048cf08467271f087e502a9e38b Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Sat, 10 Feb 2024 18:15:44 +0300 Subject: [PATCH 06/15] arm64: dts: rockchip: Add saradc and adc buttons to Khadas Edge 2 and enable tsadc This commit enables tsadc, saradc and the function button on saradc line for Khadas Edge 2. Signed-off-by: Muhammed Efe Cetin --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 24 +++++++++++++++++++ 1 file changed, 24 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index 5a3b52e62dce..dfcdbec3534d 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -3,6 +3,7 @@ /dts-v1/; #include +#include #include #include #include "rk3588s.dtsi" @@ -20,6 +21,20 @@ chosen { stdout-path = "serial2:1500000n8"; }; + adc-keys { + compatible = "adc-keys"; + io-channels = <&saradc 1>; + io-channel-names = "buttons"; + keyup-threshold-microvolt = <1800000>; + poll-interval = <100>; + + button-function { + label = "Function"; + linux,code = ; + press-threshold-microvolt = <17000>; + }; + }; + ir-receiver { compatible = "gpio-ir-receiver"; gpios = <&gpio1 RK_PA7 GPIO_ACTIVE_LOW>; @@ -257,6 +272,11 @@ &pwm15 { status = "okay"; }; +&saradc { + vref-supply = <&avcc_1v8_s0>; + status = "okay"; +}; + &sdhci { bus-width = <8>; no-sdio; @@ -604,6 +624,10 @@ regulator-state-mem { }; }; +&tsadc { + status = "okay"; +}; + &uart2 { pinctrl-0 = <&uart2m0_xfer>; status = "okay"; -- 2.44.0 From cc39e8f12c66a680db2a182a0140062622c9cfb0 Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Sat, 10 Feb 2024 18:17:54 +0300 Subject: [PATCH 07/15] arm64: dts: rockchip: Add SFC to Khadas Edge 2 This commit adds SPI flash support for Khadas Edge 2. Signed-off-by: Muhammed Efe Cetin --- .../boot/dts/rockchip/rk3588s-khadas-edge2.dts | 14 ++++++++++++++ 1 file changed, 14 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index dfcdbec3534d..c2a329f151a1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -299,6 +299,20 @@ &sdmmc { status = "okay"; }; +&sfc { + pinctrl-names = "default"; + pinctrl-0 = <&fspim2_pins>; + status = "okay"; + + flash@0 { + compatible = "jedec,spi-nor"; + reg = <0x0>; + spi-max-frequency = <100000000>; + spi-rx-bus-width = <4>; + spi-tx-bus-width = <1>; + }; +}; + &spi2 { status = "okay"; assigned-clocks = <&cru CLK_SPI2>; -- 2.44.0 From 387dc0e175fd78d8cac09cf83b158ed1b888a0c8 Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Sat, 10 Feb 2024 18:23:14 +0300 Subject: [PATCH 08/15] arm64: dts: rockchip: Add UART9 (bluetooth) to Khadas Edge 2 Khadas Edge 2 has onboard AP6275P Wi-Fi6 (PCIe2) and BT5 (UART9) module. This commit enables UART9. Signed-off-by: Muhammed Efe Cetin --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 20 +++++++++++++++++++ 1 file changed, 20 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index c2a329f151a1..767e21b2dc34 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -244,6 +244,20 @@ ir_receiver_pin: ir-receiver-pin { rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; }; }; + + wireless-bluetooth { + bt_reset_pin: bt-reset-pin { + rockchip,pins = <0 RK_PD4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + bt_wake_pin: bt-wake-pin { + rockchip,pins = <0 RK_PD3 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + bt_wake_host_irq: bt-wake-host-irq { + rockchip,pins = <0 RK_PD5 RK_FUNC_GPIO &pcfg_pull_down>; + }; + }; }; &pcie2x1l2 { @@ -647,6 +661,12 @@ &uart2 { status = "okay"; }; +&uart9 { + pinctrl-names = "default"; + pinctrl-0 = <&uart9m2_xfer &uart9m2_ctsn>; + status = "okay"; +}; + &u2phy2 { status = "okay"; }; -- 2.44.0 From 09685cbf71d87782bec6fd85506fd04e41180fe9 Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Sun, 11 Feb 2024 16:16:11 +0300 Subject: [PATCH 09/15] arm64: dts: rockchip: Add RTC to Khadas Edge 2 Khadas Edge 2 has PT7C4363 RTC that compatible with HYM8563. The RTC pinctrl is also connected to MCU. Signed-off-by: Muhammed Efe Cetin --- .../arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts | 12 ++++++++++++ 1 file changed, 12 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index 767e21b2dc34..2022a174594c 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -216,6 +216,18 @@ regulator-state-mem { }; }; +&i2c2 { + status = "okay"; + + hym8563: rtc@51 { + compatible = "haoyu,hym8563"; + reg = <0x51>; + #clock-cells = <0>; + clock-output-names = "hym8563"; + wakeup-source; + }; +}; + &pinctrl { vdd_sd { vdd_sd_en: vdd-sd-en { -- 2.44.0 From 4892da0a9050eae1fc732873bf37abb17e33bbda Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Mon, 12 Feb 2024 17:35:13 +0300 Subject: [PATCH 10/15] arm64: dts: rockchip: Add USB-C to Khadas Edge 2 Khadas Edge 2 has 2x Type-C port. One just supports PD and controlled by MCU. The other one supports PD, DP Alt mode and DRD. This commit adds support for DRD. Signed-off-by: Muhammed Efe Cetin --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 120 ++++++++++++++++++ 1 file changed, 120 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index 2022a174594c..62167dca75b7 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -6,6 +6,7 @@ #include #include #include +#include #include "rk3588s.dtsi" / { @@ -109,6 +110,18 @@ vcc5v0_host: vcc5v0-host-regulator { vin-supply = <&vcc5v0_sys>; }; + vbus5v0_typec: vbus5v0-typec-regulator { + compatible = "regulator-fixed"; + regulator-name = "vbus5v0_typec"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + enable-active-high; + gpio = <&gpio3 RK_PA4 GPIO_ACTIVE_HIGH>; + vin-supply = <&vcc5v0_sys>; + pinctrl-names = "default"; + pinctrl-0 = <&typec5v_pwren>; + }; + vcc3v3_pcie_wl: vcc3v3-pcie-wl-regulator { compatible = "regulator-fixed"; enable-active-high; @@ -219,6 +232,56 @@ regulator-state-mem { &i2c2 { status = "okay"; + usbc0: usb-typec@22 { + compatible = "fcs,fusb302"; + reg = <0x22>; + interrupt-parent = <&gpio1>; + interrupts = ; + pinctrl-names = "default"; + pinctrl-0 = <&usbc0_int>; + vbus-supply = <&vbus5v0_typec>; + status = "okay"; + + usb_con: connector { + compatible = "usb-c-connector"; + label = "USB-C"; + data-role = "dual"; + power-role = "dual"; + try-power-role = "source"; + op-sink-microwatt = <1000000>; + sink-pdos = ; + source-pdos = ; + + ports { + #address-cells = <1>; + #size-cells = <0>; + + port@0 { + reg = <0>; + usbc0_orien_sw: endpoint { + remote-endpoint = <&usbdp_phy0_orientation_switch>; + }; + }; + + port@1 { + reg = <1>; + usbc0_role_sw: endpoint { + remote-endpoint = <&dwc3_0_role_switch>; + }; + }; + + port@2 { + reg = <2>; + dp_altmode_mux: endpoint { + remote-endpoint = <&usbdp_phy0_dp_altmode_mux>; + }; + }; + }; + }; + }; + hym8563: rtc@51 { compatible = "haoyu,hym8563"; reg = <0x51>; @@ -251,6 +314,16 @@ vcc5v0_host_en: vcc5v0-host-en { }; }; + usb-typec { + usbc0_int: usbc0-int { + rockchip,pins = <1 RK_PB5 RK_FUNC_GPIO &pcfg_pull_up>; + }; + + typec5v_pwren: typec5v-pwren { + rockchip,pins = <3 RK_PA4 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + ir-receiver { ir_receiver_pin: ir-receiver-pin { rockchip,pins = <1 RK_PA7 RK_FUNC_GPIO &pcfg_pull_none>; @@ -679,6 +752,15 @@ &uart9 { status = "okay"; }; +&u2phy0 { + status = "okay"; +}; + +&u2phy0_otg { + status = "okay"; +}; + + &u2phy2 { status = "okay"; }; @@ -705,6 +787,44 @@ &usb_host0_ohci { status = "okay"; }; +&usbdp_phy0 { + orientation-switch; + mode-switch; + svid = <0xff01>; + sbu1-dc-gpios = <&gpio4 RK_PA0 GPIO_ACTIVE_HIGH>; + sbu2-dc-gpios = <&gpio4 RK_PA1 GPIO_ACTIVE_HIGH>; + status = "okay"; + + port { + #address-cells = <1>; + #size-cells = <0>; + + usbdp_phy0_orientation_switch: endpoint@0 { + reg = <0>; + remote-endpoint = <&usbc0_orien_sw>; + }; + + usbdp_phy0_dp_altmode_mux: endpoint@1 { + reg = <1>; + remote-endpoint = <&dp_altmode_mux>; + }; + }; +}; + +&usb_host0_xhci { + usb-role-switch; + status = "okay"; + + port { + #address-cells = <1>; + #size-cells = <0>; + dwc3_0_role_switch: endpoint@0 { + reg = <0>; + remote-endpoint = <&usbc0_role_sw>; + }; + }; +}; + &usb_host1_ehci { status = "okay"; }; -- 2.44.0 From 364f7e28760d32031e37e5a83b03736eebbd9bad Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Mon, 12 Feb 2024 17:35:13 +0300 Subject: [PATCH 11/15] arm64: dts: rockchip: Add bluetooth rfkill to Khadas Edge 2 --- arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts | 9 +++++++++ 1 file changed, 9 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index 62167dca75b7..b95a36b717f1 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -77,6 +77,15 @@ blue_led: led-2 { }; }; + bluetooth-rfkill { + compatible = "rfkill-gpio"; + label = "rfkill-bluetooth"; + radio-type = "bluetooth"; + shutdown-gpios = <&gpio0 RK_PD4 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&bt_reset_pin>; + }; + vcc5v0_sys: vcc5v0-sys-regulator { compatible = "regulator-fixed"; regulator-name = "vcc5v0_sys"; -- 2.44.0 From da9c12fb2957275df84ed63b99b0453e3e6f799a Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Mon, 19 Feb 2024 23:32:11 +0300 Subject: [PATCH 12/15] arm64: dts: rockchip: Add HDMI & VOP2 to Khadas Edge 2 --- .../dts/rockchip/rk3588s-khadas-edge2.dts | 36 +++++++++++++++++++ 1 file changed, 36 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index b95a36b717f1..c533b3b8c8dc 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -7,6 +7,7 @@ #include #include #include +#include #include "rk3588s.dtsi" / { @@ -821,6 +822,7 @@ usbdp_phy0_dp_altmode_mux: endpoint@1 { }; &usb_host0_xhci { + dr-mode = "otg"; usb-role-switch; status = "okay"; @@ -845,3 +847,37 @@ &usb_host1_ohci { &usb_host2_xhci { status = "okay"; }; + +&hdmi0 { + status = "okay"; +}; + +&hdptxphy_hdmi0 { + status = "okay"; +}; + +&display_subsystem { + clocks = <&hdptxphy_hdmi0>; + clock-names = "hdmi0_phy_pll"; +}; + +&vop_mmu { + status = "okay"; +}; + +&hdmi0_in { + hdmi0_in_vp0: endpoint { + remote-endpoint = <&vp0_out_hdmi0>; + }; +}; + +&vop { + status = "okay"; +}; + +&vp0 { + vp0_out_hdmi0: endpoint@ROCKCHIP_VOP2_EP_HDMI0 { + reg = ; + remote-endpoint = <&hdmi0_in_vp0>; + }; +}; -- 2.44.0 From 43c4b0f47fab3b8d726583a6ba970a1457a31fdf Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Sat, 2 Mar 2024 19:13:59 +0300 Subject: [PATCH 13/15] arm64: dts: rockchip: Add AP6275P wireless support to Khadas Edge 2 --- .../boot/dts/rockchip/rk3588s-khadas-edge2.dts | 17 +++++++++++++++++ 1 file changed, 17 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index c533b3b8c8dc..54df0a4c32a5 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -361,6 +361,23 @@ &pcie2x1l2 { reset-gpios = <&gpio3 RK_PD1 GPIO_ACTIVE_HIGH>; vpcie3v3-supply = <&vcc3v3_pcie_wl>; status = "okay"; + + pcie@0,0 { + reg = <0x400000 0 0 0 0>; + #address-cells = <3>; + #size-cells = <2>; + ranges; + device_type = "pci"; + bus-range = <0x40 0x4f>; + + wifi: wifi@0,0 { + compatible = "pci14e4,449d"; + reg = <0x410000 0 0 0 0>; + clocks = <&hym8563>; + clock-names = "32k"; + }; + }; + }; &pwm11 { -- 2.44.0 From 75fa0d77fbcf418284c11dfc30fb4eab04705a75 Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Sat, 2 Mar 2024 19:26:09 +0300 Subject: [PATCH 14/15] arm64: dts: rockchip: Add cpufreq support to Khadas Edge 2 --- .../arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts | 12 ++++++++++-- 1 file changed, 10 insertions(+), 2 deletions(-) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index 54df0a4c32a5..3248356e3d8f 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -161,34 +161,42 @@ vdd_3v3_sd: vdd-3v3-sd-regulator { &cpu_b0 { cpu-supply = <&vdd_cpu_big0_s0>; + mem-supply = <&vdd_cpu_big0_mem_s0>; }; &cpu_b1 { cpu-supply = <&vdd_cpu_big0_s0>; + mem-supply = <&vdd_cpu_big0_mem_s0>; }; &cpu_b2 { cpu-supply = <&vdd_cpu_big1_s0>; + mem-supply = <&vdd_cpu_big1_mem_s0>; }; &cpu_b3 { cpu-supply = <&vdd_cpu_big1_s0>; + mem-supply = <&vdd_cpu_big1_mem_s0>; }; &cpu_l0 { cpu-supply = <&vdd_cpu_lit_s0>; + mem-supply = <&vdd_cpu_lit_mem_s0>; }; &cpu_l1 { cpu-supply = <&vdd_cpu_lit_s0>; + mem-supply = <&vdd_cpu_lit_mem_s0>; }; &cpu_l2 { cpu-supply = <&vdd_cpu_lit_s0>; + mem-supply = <&vdd_cpu_lit_mem_s0>; }; &cpu_l3 { cpu-supply = <&vdd_cpu_lit_s0>; + mem-supply = <&vdd_cpu_lit_mem_s0>; }; &combphy0_ps { @@ -204,7 +212,7 @@ &i2c0 { pinctrl-0 = <&i2c0m2_xfer>; status = "okay"; - vdd_cpu_big0_s0: regulator@42 { + vdd_cpu_big0_s0: vdd_cpu_big0_mem_s0: regulator@42 { compatible = "rockchip,rk8602"; reg = <0x42>; fcs,suspend-voltage-selector = <1>; @@ -221,7 +229,7 @@ regulator-state-mem { }; }; - vdd_cpu_big1_s0: regulator@43 { + vdd_cpu_big1_s0: vdd_cpu_big1_mem_s0: regulator@43 { compatible = "rockchip,rk8603", "rockchip,rk8602"; reg = <0x43>; fcs,suspend-voltage-selector = <1>; -- 2.44.0 From f2714c153309250deec9e4a8fd3a1260e5f8fee7 Mon Sep 17 00:00:00 2001 From: Muhammed Efe Cetin Date: Sat, 23 Mar 2024 16:09:41 +0300 Subject: [PATCH 15/15] arm64: dts: rockchip: Add GPU to Khadas Edge 2 --- arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts | 6 ++++++ 1 file changed, 6 insertions(+) diff --git a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts index 3248356e3d8f..cf29563736ea 100644 --- a/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts +++ b/arch/arm64/boot/dts/rockchip/rk3588s-khadas-edge2.dts @@ -505,6 +505,7 @@ rk806_dvs3_null: dvs3-null-pins { regulators { vdd_gpu_s0: vdd_gpu_mem_s0: dcdc-reg1 { + regulator-always-on; regulator-boot-on; regulator-min-microvolt = <550000>; regulator-max-microvolt = <950000>; @@ -873,6 +874,11 @@ &usb_host2_xhci { status = "okay"; }; +&gpu { + mali-supply = <&vdd_gpu_s0>; + status = "okay"; +}; + &hdmi0 { status = "okay"; }; -- 2.44.0