diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 83afbe8..cc9f1ee 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -16,7 +16,8 @@ dtb-$(CONFIG_ARCH_S5P4418) += s5p4418-drone.dtb \ dtb-$(CONFIG_ARCH_S5P6818) += s5p6818-drone.dtb \ s5p6818-artik710-raptor.dtb \ - s5p6818-nanopim3.dtb + s5p6818-nanopim3.dtb \ + s5p6818-nanopi-fire3.dtb dtb-$(CONFIG_EXYNOS5) += exynos5250-arndale.dtb \ exynos5250-snow.dtb \ diff --git a/arch/arm/dts/s5p6818-nanopi-fire3.dts b/arch/arm/dts/s5p6818-nanopi-fire3.dts new file mode 100644 index 0000000..189d9b5 --- /dev/null +++ b/arch/arm/dts/s5p6818-nanopi-fire3.dts @@ -0,0 +1,87 @@ +/* + * (C) Copyright 2016 Nexell + * Youngbok, Park + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +/dts-v1/; +#include "s5p6818.dtsi" + +/ { + model = "NanoPi Fire3 board based on s5p6818"; + cpu-model = "S5p6818"; + + compatible = "nexell,s5p6818"; + + mmc0:mmc@c0062000 { + frequency = <50000000>; + nexell,drive_dly = <0x0>; + nexell,drive_shift = <0x02>; + nexell,sample_dly = <0x00>; + nexell,sample_shift = <0x01>; + status = "okay"; + }; + + mmc2:mmc@c0069000 { + frequency = <50000000>; + nexell,drive_dly = <0x0>; + nexell,drive_shift = <0x03>; + nexell,sample_dly = <0x00>; + nexell,sample_shift = <0x02>; + nexell,bus-width = <4>; + status = "okay"; + }; + + dp0:dp@c0102800 { + lcd-type = "hdmi"; + status = "okay"; + + dp-device { + preset = <0>; // 0 - 1280x720, 1 - 1920x1080 + }; + dp-planes { + layer_top { + screen_width = <280>; + screen_height = <120>; + back_color = <0>; + video_prior = <0>; + }; + layer_1 { + fb_base = <0x46000000>; + left = <30>; + top = <20>; + width = <1220>; + height = <680>; + pixel_byte = <2>; + /* possible format values for rgb layer: + * r5g6b5 0x44320000 + * b5g6r5 0xc4320000 + * x1r5g5b5 0x43420000 + * x1b5g5r5 0xc3420000 + * x4r4g4b4 0x42110000 + * x4b4g4r4 0xc2110000 + * x8r3g3b2 0x41200000 + * x8b3g3r2 0xc1200000 + * a1r5g5b5 0x33420000 + * a1b5g5r5 0xb3420000 + * a4r4g4b4 0x22110000 + * a4b4g4r4 0xa2110000 + * a8r3g3b2 0x11200000 + * a8b3g3r2 0x91200000 + * r8g8b8 0x46530000 + * b8g8r8 0xc6530000 + * x8r8g8b8 0x46530000 + * x8b8g8r8 0xc6530000 + * a8r8g8b8 0x06530000 + * a8b8g8r8 0x86530000 + */ + format = <0x44320000>; + }; + }; + }; + + dwc2otg@c0040000 { + status = "okay"; + }; +}; diff --git a/board/s5p6818/Kconfig b/board/s5p6818/Kconfig index cee812b..46acb2e 100644 --- a/board/s5p6818/Kconfig +++ b/board/s5p6818/Kconfig @@ -16,6 +16,11 @@ config TARGET_S5P6818_NANOPIM3 help Support for s5p6818 NanoPI M3 platform. +config TARGET_S5P6818_NANOPIFIRE3 + bool "S5P6818_NANOPIFIRE3" + help + Support for the s5p6818 NanoPi Fire3 platform. + endchoice config SYS_VENDOR @@ -30,4 +35,5 @@ config SYS_CONFIG_NAME source "board/s5p6818/drone/Kconfig" source "board/s5p6818/nanopim3/Kconfig" +source "board/s5p6818/nanopifire3/Kconfig" source "board/s5p6818/artik710_raptor/Kconfig" diff --git a/board/s5p6818/nanopifire3/Kconfig b/board/s5p6818/nanopifire3/Kconfig new file mode 100644 index 0000000..af8dffd --- /dev/null +++ b/board/s5p6818/nanopifire3/Kconfig @@ -0,0 +1,7 @@ +if TARGET_S5P6818_NANOPIFIRE3 + +config SYS_BOARD + default "nanopifire3" + +endif + diff --git a/board/s5p6818/nanopifire3/Makefile b/board/s5p6818/nanopifire3/Makefile new file mode 100644 index 0000000..1550b5f --- /dev/null +++ b/board/s5p6818/nanopifire3/Makefile @@ -0,0 +1 @@ +obj-y := board.o diff --git a/board/s5p6818/nanopifire3/board.c b/board/s5p6818/nanopifire3/board.c new file mode 100644 index 0000000..5870d76 --- /dev/null +++ b/board/s5p6818/nanopifire3/board.c @@ -0,0 +1,151 @@ +/* + * (C) Copyright 2016 Nexell + * Hyunseok, Jung + * + * SPDX-License-Identifier: GPL-2.0+ + */ + +#include +#include +#ifdef CONFIG_PWM_NX +#include +#endif +#include + +#include +#include +#include + + +DECLARE_GLOBAL_DATA_PTR; + +/*------------------------------------------------------------------------------ + * intialize nexell soc and board status. + */ + +/* call from u-boot */ +int board_early_init_f(void) +{ + return 0; +} + +void board_gpio_init(void) +{ + nx_gpio_initialize(); + nx_gpio_set_base_address(0, (void *)PHY_BASEADDR_GPIOA); + nx_gpio_set_base_address(1, (void *)PHY_BASEADDR_GPIOB); + nx_gpio_set_base_address(2, (void *)PHY_BASEADDR_GPIOC); + nx_gpio_set_base_address(3, (void *)PHY_BASEADDR_GPIOD); + nx_gpio_set_base_address(4, (void *)PHY_BASEADDR_GPIOE); +} + +#ifdef CONFIG_PWM_NX +void board_backlight_init(void) +{ + pwm_init(CONFIG_BACKLIGHT_CH, CONFIG_BACKLIGHT_DIV, + CONFIG_BACKLIGHT_INV); + pwm_config(CONFIG_BACKLIGHT_CH, TO_DUTY_NS(CONFIG_BACKLIGHT_DUTY, + CONFIG_BACKLIGHT_HZ), + TO_PERIOD_NS(CONFIG_BACKLIGHT_HZ)); +} +#endif + +int mmc_get_env_dev(void) +{ + static int envDev = -1; + int bl1LoadEmmc, ubootLoadPort; + + if( envDev == -1 ) { + bl1LoadEmmc = readl(PHY_BASEADDR_CLKPWR + SYSRSTCONFIG) >> 19 & 1; + printf("loaded from %s", bl1LoadEmmc ? "emmc" : "SD"); + ubootLoadPort = readl(SCR_ARM_SECOND_BOOT_REG1); + switch( ubootLoadPort ) { + case EMMC_PORT_NUM: + envDev = 0; + if( ! bl1LoadEmmc ) + printf("+emmc"); + break; + case SD_PORT_NUM: + if( bl1LoadEmmc ) + printf("+SD"); + envDev = 1; + break; + default: + printf("+unknown(%d)", ubootLoadPort); + envDev = 1; + break; + } + printf(", getting env from MMC %d\n", envDev); + } + return envDev; +} + +int board_init(void) +{ + board_gpio_init(); +#ifdef CONFIG_PWM_NX + board_backlight_init(); +#endif + return 0; +} + +/* u-boot dram initialize */ +int dram_init(void) +{ + gd->ram_size = CONFIG_SYS_SDRAM_SIZE; + return 0; +} + +/* u-boot dram board specific */ +void dram_init_banksize(void) +{ + /* set global data memory */ + gd->bd->bi_arch_number = machine_arch_type; + gd->bd->bi_boot_params = CONFIG_SYS_SDRAM_BASE + 0x00000100; + + gd->bd->bi_dram[0].start = CONFIG_SYS_SDRAM_BASE; + gd->bd->bi_dram[0].size = CONFIG_SYS_SDRAM_SIZE; +} + +#define ETHER_MAC_TAG "ethmac" + +int board_late_init(void) +{ + char dtbname[256]; + + strcpy(dtbname, CONFIG_DEFAULT_DEVICE_TREE); + strcat(dtbname, ".dtb"); + + setenv("fdtfile", dtbname); + + if( getenv("ethaddr") == NULL ) { + char tmp[18]; + unsigned char addr[6]; + u32 hash[20]; + u32 *ec2 = (u32*)0xc006705c; + u32 *ecid = (u32*)0xc0067000; + + memset(hash, 0, sizeof(hash)); + memcpy(hash + 12, ETHER_MAC_TAG, sizeof(ETHER_MAC_TAG)); + while( (readl(ec2) & 0x8000) == 0 ) + udelay(100); + hash[4] = readl(ecid); + hash[5] = readl(ecid + 1); + hash[6] = readl(ecid + 2); + hash[7] = readl(ecid + 3); + + MD5Transform(hash, hash + 4); + hash[0] ^= hash[2]; + hash[1] ^= hash[3]; + + memcpy(addr, (char *)hash, 6); + addr[0] &= 0xfe; /* clear multicast bit */ + addr[0] |= 0x02; + + sprintf(tmp, "%02x:%02x:%02x:%02x:%02x:%02x", + addr[0], addr[1], addr[2], addr[3], addr[4], addr[5]); + setenv("ethaddr", tmp); + } + return 0; +} + diff --git a/configs/nanopifire3_defconfig b/configs/nanopifire3_defconfig new file mode 100644 index 0000000..13ddfd3 --- /dev/null +++ b/configs/nanopifire3_defconfig @@ -0,0 +1,22 @@ +CONFIG_ARM=y +CONFIG_SYS_CONFIG_NAME="s5p6818_nanopim3" +CONFIG_ARCH_NEXELL=y +CONFIG_ARCH_S5P6818=y +CONFIG_SYS_MALLOC_F=y +CONFIG_DEFAULT_DEVICE_TREE="s5p6818-nanopi-fire3" +CONFIG_TARGET_S5P6818_NANOPIFIRE3=y +CONFIG_FIT=y +# CONFIG_CMD_IMI is not set +# CONFIG_CMD_IMLS is not set +# CONFIG_CMD_FLASH is not set +# CONFIG_CMD_FPGA is not set +# CONFIG_CMD_SETEXPR is not set +# CONFIG_CMD_NET is not set +# CONFIG_CMD_NFS is not set +CONFIG_CMD_FDISK=y +CONFIG_CMD_EXT4_IMG_WRITE=y +CONFIG_CMD_SD_RECOVERY=y +CONFIG_OF_CONTROL=y +CONFIG_OF_EMBED=y +CONFIG_VIDEO_NX=y +CONFIG_VIDEO_NX_HDMI=y