From 0000000000000000000000000000000000000000 Mon Sep 17 00:00:00 2001 From: Igor Pecovnik Date: Mon, 9 Mar 2020 00:03:27 +0100 Subject: [ARCHEOLOGY] WIP: Add initial support for FriendlyARM Nanopi R2S (#1793) > X-Git-Archeology: > recovered message: > * Add initial support for FriendlyARM Nanopi R2s > X-Git-Archeology: > recovered message: > One net port not working yet. > X-Git-Archeology: > recovered message: > * Enable 2nd network, rename it to lan0, adjust motd to see lan* > X-Git-Archeology: > recovered message: > * Added rk3328 dmc devfreq driver > X-Git-Archeology: > recovered message: > * Fixed SD card issues for NanoPi R2s > X-Git-Archeology: > recovered message: > * Added usb serial gadget console for NanoPi R2s > X-Git-Archeology: > recovered message: > Co-authored-by: Piotr Szczepanik > X-Git-Archeology: - Revision a0e009a73e06511ef25b948306dfe553c3cde70e: https://github.com/armbian/build/commit/a0e009a73e06511ef25b948306dfe553c3cde70e > X-Git-Archeology: Date: Mon, 09 Mar 2020 00:03:27 +0100 > X-Git-Archeology: From: Igor Pecovnik > X-Git-Archeology: Subject: WIP: Add initial support for FriendlyARM Nanopi R2S (#1793) > X-Git-Archeology: > X-Git-Archeology: - Revision 7efb5014a2afc174e8c55c92d0f0d746be3a9496: https://github.com/armbian/build/commit/7efb5014a2afc174e8c55c92d0f0d746be3a9496 > X-Git-Archeology: Date: Tue, 26 May 2020 22:20:31 +0200 > X-Git-Archeology: From: Jayantajit Gogoi <30702133+jayanta525@users.noreply.github.com> > X-Git-Archeology: Subject: Enable vcc_sd regulator on boot for NanoPi R2S (#1990) > X-Git-Archeology: > X-Git-Archeology: - Revision e36ce875b025e112127cf8cc2d34825ebfe36569: https://github.com/armbian/build/commit/e36ce875b025e112127cf8cc2d34825ebfe36569 > X-Git-Archeology: Date: Tue, 10 Nov 2020 21:43:13 +0100 > X-Git-Archeology: From: Piotr Szczepanik > X-Git-Archeology: Subject: Switched rockchip64-current to linux 5.9.y (#2309) > X-Git-Archeology: > X-Git-Archeology: - Revision 18cf7aff702832cf672117f5dc1fe4ad37598837: https://github.com/armbian/build/commit/18cf7aff702832cf672117f5dc1fe4ad37598837 > X-Git-Archeology: Date: Tue, 05 Jan 2021 23:35:03 +0100 > X-Git-Archeology: From: Piotr Szczepanik > X-Git-Archeology: Subject: Consolidate all dts Makefile changes in a single patch in rockchip64-current (#2535) > X-Git-Archeology: > X-Git-Archeology: - Revision 0cdffb29b07305209efb12cf3b5ac6032d3a1153: https://github.com/armbian/build/commit/0cdffb29b07305209efb12cf3b5ac6032d3a1153 > X-Git-Archeology: Date: Wed, 24 Mar 2021 19:01:53 +0100 > X-Git-Archeology: From: Igor Pecovnik > X-Git-Archeology: Subject: Renaming DEV branch to EDGE (#2704) > X-Git-Archeology: > X-Git-Archeology: - Revision 05a72b8954e932089d4867b55da0d353dc4ba1ac: https://github.com/armbian/build/commit/05a72b8954e932089d4867b55da0d353dc4ba1ac > X-Git-Archeology: Date: Mon, 12 Apr 2021 22:32:21 +0200 > X-Git-Archeology: From: AmadeusGhost <42570690+AmadeusGhost@users.noreply.github.com> > X-Git-Archeology: Subject: rockchip: add Orange Pi R1 Plus support (#2755) > X-Git-Archeology: > X-Git-Archeology: - Revision d8dbefd61838e5b0cfc2b93d2d168f3fb2666dfb: https://github.com/armbian/build/commit/d8dbefd61838e5b0cfc2b93d2d168f3fb2666dfb > X-Git-Archeology: Date: Tue, 27 Jul 2021 00:05:09 -0400 > X-Git-Archeology: From: tonymac32 > X-Git-Archeology: Subject: [ rockchip64 ] rk3328 change to mainline USB3 > X-Git-Archeology: > X-Git-Archeology: - Revision dd51f9f2afcbc83a3e10b32eb6a5061d91d1558e: https://github.com/armbian/build/commit/dd51f9f2afcbc83a3e10b32eb6a5061d91d1558e > X-Git-Archeology: Date: Tue, 09 Nov 2021 18:06:34 +0100 > X-Git-Archeology: From: Igor Pecovnik > X-Git-Archeology: Subject: Bump imx6, xu4, rockchip64 and jetson-nano to 5.15 (#3238) > X-Git-Archeology: > X-Git-Archeology: - Revision 29335b0c99aae81a37d94dc65ad617224e89fbe8: https://github.com/armbian/build/commit/29335b0c99aae81a37d94dc65ad617224e89fbe8 > X-Git-Archeology: Date: Thu, 11 Nov 2021 22:31:07 +0100 > X-Git-Archeology: From: Paolo Sabatino > X-Git-Archeology: Subject: rk3328: dmc driver fixes: > X-Git-Archeology: > X-Git-Archeology: - Revision 6ff15fe54f0423267ef464927e3780bc47703eed: https://github.com/armbian/build/commit/6ff15fe54f0423267ef464927e3780bc47703eed > X-Git-Archeology: Date: Sat, 26 Feb 2022 15:03:33 +0100 > X-Git-Archeology: From: schwar3kat <61094841+schwar3kat@users.noreply.github.com> > X-Git-Archeology: Subject: Add orangepi r1 plus lts (#3514) > X-Git-Archeology: > X-Git-Archeology: - Revision 26437e36c18bb09484f4150e396a1784cc6471b7: https://github.com/armbian/build/commit/26437e36c18bb09484f4150e396a1784cc6471b7 > X-Git-Archeology: Date: Thu, 16 Jun 2022 12:27:05 +0200 > X-Git-Archeology: From: Piotr Szczepanik > X-Git-Archeology: Subject: Switched rockchip64 u-boot to v2022.04 (#3871) > X-Git-Archeology: > X-Git-Archeology: - Revision 4df997bcf1027ac25eedce0a46cbde528dff20d1: https://github.com/armbian/build/commit/4df997bcf1027ac25eedce0a46cbde528dff20d1 > X-Git-Archeology: Date: Sat, 25 Jun 2022 13:40:09 +1200 > X-Git-Archeology: From: schwar3kat <61094841+schwar3kat@users.noreply.github.com> > X-Git-Archeology: Subject: Refactored dts for orangepi-r1-lts > X-Git-Archeology: > X-Git-Archeology: - Revision f99b356ff47757f59bee370a6c2b0329b0a028e6: https://github.com/armbian/build/commit/f99b356ff47757f59bee370a6c2b0329b0a028e6 > X-Git-Archeology: Date: Fri, 14 Oct 2022 09:19:50 +0200 > X-Git-Archeology: From: Igor Pecovnik > X-Git-Archeology: Subject: Bump Rockchip64 u-boot to 2022.07 (#4246) > X-Git-Archeology: > X-Git-Archeology: - Revision 2813365dd25e3ad110936cbf014b95b38d7090ec: https://github.com/armbian/build/commit/2813365dd25e3ad110936cbf014b95b38d7090ec > X-Git-Archeology: Date: Mon, 07 Nov 2022 21:29:00 +0100 > X-Git-Archeology: From: Igor Pecovnik > X-Git-Archeology: Subject: Move known non working rockhip64 boards to previous boot loader (#4392) > X-Git-Archeology: --- arch/arm/dts/Makefile | 1 + arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts | 607 ++++++++++ configs/orangepi_r1_plus_lts_rk3328_defconfig | 99 ++ drivers/net/phy/phy.c | 6 + 4 files changed, 713 insertions(+) diff --git a/arch/arm/dts/Makefile b/arch/arm/dts/Makefile index 261aa8fb58..ce5f8c27c5 100644 --- a/arch/arm/dts/Makefile +++ b/arch/arm/dts/Makefile @@ -123,6 +123,7 @@ dtb-$(CONFIG_ROCKCHIP_RK3328) += \ rk3328-evb.dtb \ rk3328-nanopi-r2s.dtb \ rk3328-orangepi-r1-plus.dtb \ + rk3328-orangepi-r1-plus-lts.dtb \ rk3328-roc-cc.dtb \ rk3328-rock64.dtb \ rk3328-rock-pi-e.dtb diff --git a/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts b/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts new file mode 100644 index 0000000000..08c90d695b --- /dev/null +++ b/arch/arm/dts/rk3328-orangepi-r1-plus-lts.dts @@ -0,0 +1,607 @@ +// SPDX-License-Identifier: (GPL-2.0+ OR MIT) +/* + * Copyright (c) 2020 Shenzhen Xunlong Software CO.,Limited + * Copyright (c) 2021 AmadeusGhost + * Revised for Orange Pi R1 Plus LTS (c) 2022 schwar3kat + * Based on Orange Pi R1 + */ + +/dts-v1/; +#include +#include "rk3328.dtsi" + +/ { + model = "Xunlong Orange Pi R1 Plus LTS"; + compatible = "xunlong,orangepi-r1-plus", "rockchip,rk3328"; + + aliases { + ethernet1 = &rtl8153; + mmc0 = &sdmmc; + }; + + chosen { + bootargs = "swiotlb=1 coherent_pool=1m consoleblank=0"; + stdout-path = "serial2:1500000n8"; + }; + + gmac_clkin: external-gmac-clock { + compatible = "fixed-clock"; + clock-frequency = <125000000>; + clock-output-names = "gmac_clkin"; + #clock-cells = <0>; + }; + + mach: board { + compatible = "orangepi,board"; + machine = "ORANGEPI-R1-LTS"; + hwrev = <255>; + model = "OrangePi R1 Series"; + nvmem-cells = <&efuse_id>, <&efuse_cpu_version>; + nvmem-cell-names = "id", "cpu-version"; + }; + + leds: gpio-leds { + compatible = "gpio-leds"; + pinctrl-names = "default"; + pinctrl-0 =<&leds_gpio>; + status = "disabled"; + #address-cells = <1>; + #size-cells = <0>; + + led@1 { + gpios = <&gpio0 RK_PA2 GPIO_ACTIVE_HIGH>; + label = "status_led"; + linux,default-trigger = "heartbeat"; + linux,default-trigger-delay-ms = <0>; + }; + }; + + sdio_pwrseq: sdio-pwrseq { + compatible = "mmc-pwrseq-simple"; + clocks = <&rk805 1>; + clock-names = "ext_clock"; + pinctrl-names = "default"; + pinctrl-0 = <&wifi_enable_h>; + + /* + * On the module itself this is one of these (depending + * on the actual card populated): + * - SDIO_RESET_L_WL_REG_ON + * - PDN (power down when low) + */ + reset-gpios = <&gpio3 RK_PB0 GPIO_ACTIVE_LOW>; + }; + + vcc_sd: sdmmc-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio0 30 GPIO_ACTIVE_LOW>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0m1_pin>; + regulator-name = "vcc_sd"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + vin-supply = <&vcc_io>; + }; + + vccio_sd: sdmmcio-regulator { + compatible = "regulator-gpio"; + gpios = <&gpio1 RK_PD4 GPIO_ACTIVE_HIGH>; + states = <1800000 0x1 + 3300000 0x0>; + regulator-name = "vccio_sd"; + regulator-type = "voltage"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + vin-supply = <&vcc_io>; + startup-delay-us = <2000>; + regulator-settling-time-us = <5000>; + enable-active-high; + status = "disabled"; + }; + + vcc_sys: vcc-sys { + compatible = "regulator-fixed"; + regulator-name = "vcc_sys"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + vcc_phy: vcc-phy-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_phy"; + regulator-always-on; + regulator-boot-on; + }; + + vcc_host_vbus: host-vbus-regulator { + compatible = "regulator-fixed"; + regulator-name = "vcc_host_vbus"; + regulator-always-on; + regulator-boot-on; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + }; + + dfi: dfi@ff790000 { + reg = <0x00 0xff790000 0x00 0x400>; + compatible = "rockchip,rk3328-dfi"; + rockchip,grf = <&grf>; + status = "disabled"; + }; +}; + +&cpu0 { + cpu-supply = <&vdd_arm>; +}; + +&dfi { + status = "okay"; +}; + +&emmc { + bus-width = <8>; + cap-mmc-highspeed; + max-frequency = <150000000>; + mmc-hs200-1_8v; + no-sd; + non-removable; + pinctrl-names = "default"; + pinctrl-0 = <&emmc_clk &emmc_cmd &emmc_bus8>; + vmmc-supply = <&vcc_io>; + vqmmc-supply = <&vcc18_emmc>; + status = "okay"; +}; + +&gmac2phy { + phy-supply = <&vcc_phy>; + clock_in_out = "output"; + assigned-clocks = <&cru SCLK_MAC2PHY_SRC>; + assigned-clock-rate = <50000000>; + assigned-clocks = <&cru SCLK_MAC2PHY>; + assigned-clock-parents = <&cru SCLK_MAC2PHY_SRC>; + status = "disabled"; +}; + +&gmac2io { + assigned-clocks = <&cru SCLK_MAC2IO>, <&cru SCLK_MAC2IO_EXT>; + assigned-clock-parents = <&gmac_clkin>, <&gmac_clkin>; + clock_in_out = "input"; + pinctrl-names = "default"; + pinctrl-0 = <&rgmiim1_pins>; + phy-handle = <&rtl8153>; + phy-mode = "rgmii"; + phy-supply = <&vcc_phy>; + snps,reset-active-low; + snps,reset-delays-us = <0 10000 30000>; + snps,reset-gpio = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; + snps,aal; + snps,rxpbl = <0x4>; + snps,txpbl = <0x4>; + tx_delay = <0x24>; + rx_delay = <0x18>; + status = "okay"; + + mdio { + compatible = "snps,dwmac-mdio"; + #address-cells = <1>; + #size-cells = <0>; + + rtl8153: phy@0 { + reg = <0>; + reset-assert-us = <10000>; + reset-deassert-us = <30000>; + /* reset-gpios = <&gpio1 RK_PC2 GPIO_ACTIVE_LOW>; */ + }; + }; +}; + +&i2c1 { + status = "okay"; + + rk805: rk805@18 { + compatible = "rockchip,rk805"; + reg = <0x18>; + interrupt-parent = <&gpio2>; + interrupts = <6 IRQ_TYPE_LEVEL_LOW>; + #clock-cells = <1>; + clock-output-names = "xin32k", "rk805-clkout2"; + gpio-controller; + #gpio-cells = <2>; + pinctrl-names = "default"; + pinctrl-0 = <&pmic_int_l>; + rockchip,system-power-controller; + wakeup-source; + + vcc1-supply = <&vcc_sys>; + vcc2-supply = <&vcc_sys>; + vcc3-supply = <&vcc_sys>; + vcc4-supply = <&vcc_sys>; + vcc5-supply = <&vcc_io>; + vcc6-supply = <&vcc_io>; + + regulators { + vdd_logic: DCDC_REG1 { + regulator-name = "vdd_logic"; + regulator-init-microvolt = <1075000>; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1450000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + + vdd_arm: DCDC_REG2 { + regulator-name = "vdd_arm"; + regulator-init-microvolt = <1225000>; + regulator-min-microvolt = <712500>; + regulator-max-microvolt = <1450000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <950000>; + }; + }; + + vcc_ddr: DCDC_REG3 { + regulator-name = "vcc_ddr"; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + }; + }; + + vcc_io: DCDC_REG4 { + regulator-name = "vcc_io"; + regulator-min-microvolt = <3300000>; + regulator-max-microvolt = <3300000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <3300000>; + }; + }; + + vcc_18: LDO_REG1 { + regulator-name = "vcc_18"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vcc18_emmc: LDO_REG2 { + regulator-name = "vcc18_emmc"; + regulator-min-microvolt = <1800000>; + regulator-max-microvolt = <1800000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1800000>; + }; + }; + + vdd_10: LDO_REG3 { + regulator-name = "vdd_10"; + regulator-min-microvolt = <1000000>; + regulator-max-microvolt = <1000000>; + regulator-always-on; + regulator-boot-on; + regulator-state-mem { + regulator-on-in-suspend; + regulator-suspend-microvolt = <1000000>; + }; + }; + }; + }; +}; + +&io_domains { + status = "okay"; + + vccio1-supply = <&vcc_io>; + vccio2-supply = <&vcc18_emmc>; + vccio3-supply = <&vcc_io>; + vccio4-supply = <&vcc_io>; + vccio5-supply = <&vcc_io>; + vccio6-supply = <&vcc_18>; + pmuio-supply = <&vcc_io>; +}; + +&pinctrl { + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + sdio-pwrseq { + wifi_enable_h: wifi-enable-h { + rockchip,pins = <3 RK_PB0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + sdmmc0 { + sdmmc0_clk: sdmmc0-clk { + rockchip,pins = <1 RK_PA6 1 &pcfg_pull_none_4ma>; + }; + + sdmmc0_cmd: sdmmc0-cmd { + rockchip,pins = <1 RK_PA4 1 &pcfg_pull_up_4ma>; + }; + + sdmmc0_dectn: sdmmc0-dectn { + rockchip,pins = <1 RK_PA5 1 &pcfg_pull_up_4ma>; + }; + + sdmmc0_bus4: sdmmc0-bus4 { + rockchip,pins = + <1 RK_PA0 1 &pcfg_pull_up_4ma>, + <1 RK_PA1 1 &pcfg_pull_up_4ma>, + <1 RK_PA2 1 &pcfg_pull_up_4ma>, + <1 RK_PA3 1 &pcfg_pull_up_4ma>; + }; + }; + + sdmmc0ext { + sdmmc0ext_clk: sdmmc0ext-clk { + rockchip,pins = <3 RK_PA2 3 &pcfg_pull_none_2ma>; + }; + + sdmmc0ext_cmd: sdmmc0ext-cmd { + rockchip,pins = <3 RK_PA0 3 &pcfg_pull_up_2ma>; + }; + + sdmmc0ext_bus4: sdmmc0ext-bus4 { + rockchip,pins = + <3 RK_PA4 3 &pcfg_pull_up_2ma>, + <3 RK_PA5 3 &pcfg_pull_up_2ma>, + <3 RK_PA6 3 &pcfg_pull_up_2ma>, + <3 RK_PA7 3 &pcfg_pull_up_2ma>; + }; + }; + + gmac-1 { + rgmiim1_pins: rgmiim1-pins { + rockchip,pins = + /* mac_txclk */ + <1 RK_PB4 2 &pcfg_pull_none_4ma>, + /* mac_rxclk */ + <1 RK_PB5 2 &pcfg_pull_none>, + /* mac_mdio */ + <1 RK_PC3 2 &pcfg_pull_none_2ma>, + /* mac_txen */ + <1 RK_PD1 2 &pcfg_pull_none_4ma>, + /* mac_clk */ + <1 RK_PC5 2 &pcfg_pull_none_2ma>, + /* mac_rxdv */ + <1 RK_PC6 2 &pcfg_pull_none>, + /* mac_mdc */ + <1 RK_PC7 2 &pcfg_pull_none_2ma>, + /* mac_rxd1 */ + <1 RK_PB2 2 &pcfg_pull_none>, + /* mac_rxd0 */ + <1 RK_PB3 2 &pcfg_pull_none>, + /* mac_txd1 */ + <1 RK_PB0 2 &pcfg_pull_none_4ma>, + /* mac_txd0 */ + <1 RK_PB1 2 &pcfg_pull_none_4ma>, + /* mac_rxd3 */ + <1 RK_PB6 2 &pcfg_pull_none>, + /* mac_rxd2 */ + <1 RK_PB7 2 &pcfg_pull_none>, + /* mac_txd3 */ + <1 RK_PC0 2 &pcfg_pull_none_4ma>, + /* mac_txd2 */ + <1 RK_PC1 2 &pcfg_pull_none_4ma>, + + /* mac_txclk */ + <0 RK_PB0 1 &pcfg_pull_none>, + /* mac_txen */ + <0 RK_PB4 1 &pcfg_pull_none>, + /* mac_clk */ + <0 RK_PD0 1 &pcfg_pull_none>, + /* mac_txd1 */ + <0 RK_PC0 1 &pcfg_pull_none>, + /* mac_txd0 */ + <0 RK_PC1 1 &pcfg_pull_none>, + /* mac_txd3 */ + <0 RK_PC7 1 &pcfg_pull_none>, + /* mac_txd2 */ + <0 RK_PC6 1 &pcfg_pull_none>; + }; + }; + + usb { + host_vbus_drv: host-vbus-drv { + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + otg_vbus_drv: otg-vbus-drv { + rockchip,pins = <3 RK_PA1 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + gpio-leds { + leds_gpio: leds-gpio { + rockchip,pins = <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&sdmmc { + bus-width = <4>; + cap-mmc-highspeed; + cap-sd-highspeed; + disable-wp; + max-frequency = <150000000>; + pinctrl-names = "default"; + pinctrl-0 = <&sdmmc0_clk &sdmmc0_cmd &sdmmc0_dectn &sdmmc0_bus4>; + vmmc-supply = <&vcc_sd>; + status = "okay"; +}; + +&uart2 { + status = "okay"; + + gpio-keys { + compatible = "gpio-keys"; + #address-cells = <1>; + #size-cells = <0>; + autorepeat; + + pinctrl-names = "default"; + pinctrl-0 = <&gpio_key1>; + + button@0 { + reg = <0>; + gpios = <&gpio0 RK_PA0 GPIO_ACTIVE_LOW>; + label = "reset"; + linux,code = ; + linux,input-type = <1>; + gpio-key,wakeup = <1>; + debounce-interval = <100>; + }; + }; + + vcc_rtl8153: vcc-rtl8153-regulator { + compatible = "regulator-fixed"; + gpio = <&gpio2 RK_PC6 GPIO_ACTIVE_HIGH>; + pinctrl-names = "default"; + pinctrl-0 = <&usb30_en_drv>; + regulator-always-on; + regulator-name = "vcc_rtl8153"; + regulator-min-microvolt = <5000000>; + regulator-max-microvolt = <5000000>; + off-on-delay-us = <5000>; + enable-active-high; + }; +}; + + +&emmc { + status = "disabled"; +}; + +&i2c0 { + status = "okay"; +}; + +&leds { + status = "okay"; + + led@2 { + gpios = <&gpio2 RK_PB7 GPIO_ACTIVE_HIGH>; + label = "lan_led"; + reg = <0>; + }; + + led@3 { + gpios = <&gpio2 RK_PC2 GPIO_ACTIVE_HIGH>; + label = "wan_led"; + reg = <0>; + }; +}; + +&leds_gpio { + rockchip,pins = + <0 RK_PA2 RK_FUNC_GPIO &pcfg_pull_none>, + <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, + <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>; +}; + +&rk805 { + interrupt-parent = <&gpio1>; + interrupts = ; +}; + +&vccio_sd { + status = "okay"; +}; + +&io_domains { + vccio3-supply = <&vccio_sd>; +}; + +&sdmmc { + vqmmc-supply = <&vccio_sd>; + max-frequency = <150000000>; + sd-uhs-sdr50; + sd-uhs-sdr104; + status = "okay"; +}; + +&sdio_pwrseq { + status = "disabled"; +}; + +&pinctrl { + pmic { + pmic_int_l: pmic-int-l { + rockchip,pins = <1 RK_PD0 RK_FUNC_GPIO &pcfg_pull_up>; + }; + }; + + pwm { + pwm2_sleep_pin: pwm2-sleep-pin { + rockchip,pins = <2 RK_PA6 RK_FUNC_GPIO &pcfg_output_low>; + }; + }; + + rockchip-key { + gpio_key1: gpio-key1 { + rockchip,pins = <0 RK_PA0 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; + + usb { + otg_vbus_drv: otg-vbus-drv { + rockchip,pins = <1 RK_PD2 RK_FUNC_GPIO &pcfg_pull_none>; + }; + + usb30_en_drv: usb30-en-drv { + rockchip,pins = <2 RK_PC6 RK_FUNC_GPIO &pcfg_pull_none>; + }; + }; +}; + +&leds_gpio { + rockchip,pins = + <2 RK_PB7 RK_FUNC_GPIO &pcfg_pull_none>, + <2 RK_PC2 RK_FUNC_GPIO &pcfg_pull_none>, + <3 RK_PC5 RK_FUNC_GPIO &pcfg_pull_none>; +}; + +&leds { + led@1 { + gpios = <&gpio3 RK_PC5 GPIO_ACTIVE_HIGH>; + reg = <0>; + }; +}; + +&spi0 { + status = "okay"; + + spiflash@0 { + compatible = "jedec,spi-nor"; + reg = <0>; + spi-max-frequency = <10000000>; + }; +}; + +&uart1 { + status = "okay"; +}; diff --git a/configs/orangepi_r1_plus_lts_rk3328_defconfig b/configs/orangepi_r1_plus_lts_rk3328_defconfig new file mode 100644 index 0000000000..6ed17d82bc --- /dev/null +++ b/configs/orangepi_r1_plus_lts_rk3328_defconfig @@ -0,0 +1,99 @@ +CONFIG_ARM=y +CONFIG_SKIP_LOWLEVEL_INIT=y +CONFIG_ARCH_ROCKCHIP=y +CONFIG_SYS_TEXT_BASE=0x00200000 +CONFIG_ROCKCHIP_RK3328=y +CONFIG_TPL_ROCKCHIP_COMMON_BOARD=y +CONFIG_TPL_LIBCOMMON_SUPPORT=y +CONFIG_TPL_LIBGENERIC_SUPPORT=y +#CONFIG_SPL_DRIVERS_MISC_SUPPORT=y +CONFIG_SPL_DRIVERS_MISC=y +CONFIG_ENV_OFFSET=0x3F8000 +CONFIG_SPL_STACK_R_ADDR=0x600000 +CONFIG_NR_DRAM_BANKS=1 +CONFIG_DEBUG_UART_BASE=0xFF130000 +CONFIG_DEBUG_UART_CLOCK=24000000 +CONFIG_SMBIOS_PRODUCT_NAME="rock64_rk3328" +CONFIG_DEBUG_UART=y +CONFIG_TPL_SYS_MALLOC_F_LEN=0x800 +CONFIG_SYS_LOAD_ADDR=0x800800 +# CONFIG_ANDROID_BOOT_IMAGE is not set +CONFIG_FIT=y +CONFIG_FIT_VERBOSE=y +CONFIG_SPL_LOAD_FIT=y +CONFIG_DEFAULT_FDT_FILE="rockchip/rk3328-orangepi-r1-plus-lts.dtb" +CONFIG_MISC_INIT_R=y +# CONFIG_DISPLAY_CPUINFO is not set +CONFIG_DISPLAY_BOARDINFO_LATE=y +# CONFIG_SPL_RAW_IMAGE_SUPPORT is not set +CONFIG_TPL_SYS_MALLOC_SIMPLE=y +CONFIG_SPL_STACK_R=y +CONFIG_SPL_ATF=y +CONFIG_SPL_ATF_NO_PLATFORM_PARAM=y +CONFIG_CMD_BOOTZ=y +CONFIG_CMD_GPT=y +CONFIG_CMD_MMC=y +CONFIG_CMD_USB=y +# CONFIG_CMD_SETEXPR is not set +CONFIG_CMD_TIME=y +CONFIG_SPL_OF_CONTROL=y +CONFIG_TPL_OF_CONTROL=y +CONFIG_DEFAULT_DEVICE_TREE="rk3328-orangepi-r1-plus-lts" +CONFIG_OF_SPL_REMOVE_PROPS="pinctrl-0 pinctrl-names clock-names interrupt-parent assigned-clocks assigned-clock-rates assigned-clock-parents" +CONFIG_TPL_OF_PLATDATA=y +CONFIG_ENV_IS_IN_MMC=y +CONFIG_SYS_RELOC_GD_ENV_ADDR=y +CONFIG_NET_RANDOM_ETHADDR=y +CONFIG_TPL_DM=y +CONFIG_REGMAP=y +CONFIG_SPL_REGMAP=y +CONFIG_TPL_REGMAP=y +CONFIG_SYSCON=y +CONFIG_SPL_SYSCON=y +CONFIG_TPL_SYSCON=y +CONFIG_CLK=y +CONFIG_SPL_CLK=y +CONFIG_FASTBOOT_BUF_ADDR=0x800800 +CONFIG_FASTBOOT_CMD_OEM_FORMAT=y +CONFIG_ROCKCHIP_GPIO=y +CONFIG_SYS_I2C_ROCKCHIP=y +CONFIG_MMC_DW=y +CONFIG_MMC_DW_ROCKCHIP=y +CONFIG_SF_DEFAULT_SPEED=20000000 +CONFIG_DM_ETH=y +CONFIG_ETH_DESIGNWARE=y +CONFIG_GMAC_ROCKCHIP=y +CONFIG_PHY=y +CONFIG_PINCTRL=y +CONFIG_SPL_PINCTRL=y +CONFIG_DM_PMIC=y +CONFIG_PMIC_RK8XX=y +CONFIG_SPL_PMIC_RK8XX=y +CONFIG_REGULATOR_PWM=y +CONFIG_DM_REGULATOR_FIXED=y +CONFIG_REGULATOR_RK8XX=y +CONFIG_PWM_ROCKCHIP=y +CONFIG_RAM=y +CONFIG_SPL_RAM=y +CONFIG_TPL_RAM=y +CONFIG_DM_RESET=y +CONFIG_BAUDRATE=1500000 +CONFIG_DEBUG_UART_SHIFT=2 +CONFIG_SYSRESET=y +# CONFIG_TPL_SYSRESET is not set +CONFIG_USB=y +CONFIG_USB_XHCI_HCD=y +CONFIG_USB_XHCI_DWC3=y +CONFIG_USB_EHCI_HCD=y +CONFIG_USB_EHCI_GENERIC=y +CONFIG_USB_OHCI_HCD=y +CONFIG_USB_OHCI_GENERIC=y +CONFIG_USB_DWC2=y +CONFIG_USB_DWC3=y +# CONFIG_USB_DWC3_GADGET is not set +CONFIG_USB_GADGET=y +CONFIG_USB_GADGET_DWC2_OTG=y +CONFIG_SPL_TINY_MEMSET=y +CONFIG_TPL_TINY_MEMSET=y +CONFIG_ERRNO_STR=y +CONFIG_SMBIOS_MANUFACTURER="rockchip64" diff --git a/drivers/net/phy/phy.c b/drivers/net/phy/phy.c index c9fc20855b..801eeddbf7 100644 --- a/drivers/net/phy/phy.c +++ b/drivers/net/phy/phy.c @@ -642,6 +642,8 @@ static struct phy_driver *generic_for_interface(phy_interface_t interface) return &genphy_driver; } +#define YT_8531C_PHY_ID 0x4f51e91b + static struct phy_driver *get_phy_driver(struct phy_device *phydev, phy_interface_t interface) { @@ -649,6 +651,10 @@ static struct phy_driver *get_phy_driver(struct phy_device *phydev, int phy_id = phydev->phy_id; struct phy_driver *drv = NULL; + if(phy_id == YT_8531C_PHY_ID) + env_set("ethernet_phy", "yt8531c"); + else + env_set("ethernet_phy", "rtl8211f"); list_for_each(entry, &phy_drivers) { drv = list_entry(entry, struct phy_driver, list); if ((drv->uid & drv->mask) == (phy_id & drv->mask)) -- Armbian